# The best stack-up possible with a four-layer PCB?

I'm designing a 4 layer PCB and I know that the standard stack-up is

1. Signals
2. GND
3. VCC
4. Signals

(GND and VCC can be switched depending on the layer with more signals)

The problem is, I don't really want to connect all ground pins through vias, there are just too many of them. Maybe because I'm not used to 4 layer PCBs, anyway, I've read a tip by Henry W. Ott about a different stack-up

1. GND
2. Signals
3. Signals
4. GND

(Where the power is being routed with wide traces on the signal planes.)

According to him, this is the best stack-up possible with a four-layer PCB, for the following reasons:

1. Signal layers are adjacent to ground planes.
2. Signal layers are tightly coupled (close) to their adjacent planes.
3. The ground planes can act as shields for the inner signal layers. (I think this requires stitching.)
4. Multiple ground planes lower the ground (reference plane) impedance of the board and reduce the common-mode radiation. (I don't really understand this one.)

One problem is cross-talk, but I really don't have any signals in the third layer, so I don't think that cross-talk will be an issue with this stack-up. Am I correct in my assumption?

Note: The highest frequency is 48MHz and there's a WiFi module on the board, too.

• Stackup discussions are useless, if you don't specify which planes are tightly spaced. Jan 12 at 12:31

You will hate yourself if you do stack up number two ;) Maybe that's harsh but it's a going to be a PITA reworking a board with all internal signals. Don't be afraid of vias either.

1.Signal layers are adjacent to ground planes.

Stop thinking about ground planes, and think more about reference planes. A signal running over a reference plane, whose voltage happens to be at VCC will still return over that reference plane. So the argument that somehow having your signal run over GND and not VCC is better is basically invalid.

2.Signal layers are tightly coupled (close) to their adjacent planes.

See number one I think the misunderstanding about only GND planes offering a return path leads to this misconception. What you want to do is keep your signals close to their reference planes, and at a constant correct impedance.

3.The ground planes can act as shields for the inner signal layers. (I think this requires stitching ??)

Yeah you could try to make a cage like this I guess, for your board you'll get better results keeping your trace to plane height as low as possible.

4.Multiple ground planes lower the ground (reference plane) impedance of the board and reduce the common-mode radiation. (don't really understand this one)

I think you've taken this to mean the more gnd planes I have the better, which is not really the case. This sounds like a broken rule of thumb to me.

My recommendation for your board based only on what you've told me is to do the following:

Signal Layer
(thin maybe 4-5mil FR4)
GND
(main FR-4 thickness, maybe 52 mil more or less depending on your final thickness)
VCC
(thin maybe 4-5mil FR4)
Signal Layer


Make sure you decouple properly.

Then if you really want to get into this go to amazon and buy either Dr. Johnson's High Speed Digital Design: A Handbook of Black Magic, or maybe Eric Bogatin's Signal and Power Integrity - Simplified. Read it love, live it :) Their websites have great information as well.

Good luck!

• Great analysis! this is exactly what I was looking for, to understand why, I won't be using that stack-up now that I've seen the light :), thank you very much for the information, and the books too.
– mux
Sep 16, 2012 at 18:10
• I went on holiday for a week, and didn't take any books with me except Howard Johnson's book. It's a good way to force yourself to read through a big technical book. Sep 16, 2012 at 19:13
• Could anyone explain the first point? What does it mean by saying signals running through a reference plane? As far as I know, signal runs from A to B and then from B to A through ground. May 25, 2014 at 13:27
• N.B. The free "Opamps for Everyone" chapter 17 gives pretty much the same advice as you did, which I've excerpted here before finding this question.
– Fizz
Oct 31, 2015 at 15:32
• Can you recommend a book for general digital PCB design? Jun 26, 2019 at 14:48

There is no such thing as THE best layer stackup. If you read carefully, the stackup with grounds on outer layers is said to be best from EMC perspective.

I don't like that configuration, though. Firstly, if your board uses SMT components, you'll have a lot more breaks in your planes. Secondly, any debugging or rework will be virtually impossible.

If you need to use such a configuration, you're doing something horribly wrong.

Also, there is nothing wrong with using vias for grounding. If you need to lower the inductance, just place more vias.

• yes, there's no absolute best way of doing anything, I was asking with respect to my specific application, I don't have to use that configuration and I won't after reading the answers, thanks :)
– mux
Sep 16, 2012 at 17:59

"best" depends on the application. Theres really two questions to address in your post

1. "Conventional" (signals on outer layers, planes on inner layers) VS "inside-out" (signals on inner layers, planes on outer layers).
An inside-out board will have better EMC performance but it will be much harder to modify when you realise you screwed up the design, will need more vias which is not great from a density or signal integrity point of view and if you are using IC packages whose pin pitch is too small to put ground between the pads then you end up with big holes in your planes which is also not great from a signal itegrity perspective.

2. two ground planes VS one ground plane and one power plane.
In both cases when a high speed signal changes reference plane there needs to be a nearby path for it's return current to move between the two reference planes. With two ground planes you can do that with a single via connecting the two planes directly. With ground and power planes the connection has to go via a capacitor which typically (assuming a "conventional" stackup) requires two vias and a capacitor. That means worse signal integrity and more board area taken up. On the other hand having a power plane reduces volt drop on your power rail and frees up space on your signal layers.

As the others said, it depends on your application. Another stackup I've found useful is

1. Signals (low speed)
2. Power
3. Signals (impedance controlled)
4. GND

This keeps the two signal groups well isolated from each other, gives excellent impedance matching and allows me to dump heat into the ground plane.

• Why was this answer downvoted? The only reason I can think of is that the impedance controlled traces being on a inner layer means that they'll always need vias from the SMD pads to said layer which might not be "ideal", but other than that it seems like a perfectly valid answer, particularly since the vias might not even be a problem.
– Chi
Aug 1, 2019 at 0:37

I think the second one is better, because most stuff is ground referenced anyway (including power) so you can just route everywhere.

I usually use a variation of this, which has the two GND layers internal and uses the external layers for routing. That way I can avoid vias for a lot of stuff which can be directly connected on the external layers. I don't think that the GND planes being internal has much bad consequences on emissions. The tight coupling is the same and the component leads are outside anyway.

If I were in a situation which genuinely needs a lot of plane capacitance for power supply, I wouldn't use 4 layers but add a tightly coupled POW+GND plane pair to the stack. This only really matters for extremely fast chips that have stringent power supply impedance requirements at multi-GHz frequencies.

Having said that, most manufacturers' stack ups I know don't have the inner two planes tightly coupled in a 4 layer board by default. That means that POW+GND on those layers will be not so amazing as one could hope for. And for a low frequency design, the first stackup is a pure waste of board space due to that power plane.