I have designed a slightly modified second order (3-bit) multi-bit incremental sigma delta modulator (IDSM) in simulink (system level). The SNR that I get is 45dB, which is not as expected. But ideally with 3-bit IDSM, we should get 78 dB. So, I wanted to troubleshoot why my designed second order system is not behaving as it should.
For copyright reasons, I could not share the exact designed architecture. But the architecture is similar to the model shown below:
(I use the fine ADC as 2nd order sigma delta). The reason that I compared with (3-bit) multi-bit incremental sigma delta modulator is that I have 3-bit coarse ADC.
I would like to know any other way (other than SNR) to verify/troubleshoot why we would not get a second order behavior?
1-noise shaped output spectrum (which i could not for Incremental architecture, but I have posted a question in DSP forum for this - https://dsp.stackexchange.com/questions/54548/how-to-plot-noise-shaped-spectrum-of-first-order-incremental-sigma-delta-adcs-o)
I guess that this is a control system loop and is there any other way to troubleshoot like - Impulse response or any other way?