Common Mode and differential Mode gain of this Cmos diff Amp inverter This is one of questions our prof gave to students in recent years and im preparing myself for this exam.

What is Common Mode and differential Mode gain of this Cmos diff Amp inverter?

i understand that Q1 and Q2 with Q1l and Q2l are making a differential amplifier with active load. but what is Q5 ? is that a current source ? if so why its Gate voltage comes from N1.

also the output is connected to a Cmos inverter, in digital this makes sense but here what if input of Cmos inverter is not either zero or vdd but vdd/2 ? isn't it going to also amplify the output in that range making the amplifier non-linear ?

Q5 acts indeed as a current load. Imagine that you have no differential input, and some "good" common mode voltage on the diff pair. The current through the two branches must be equal, so the current in Q1L and Q2L is the same, and Q5 carries twice that.

Normally, you would need to connect some sort of voltage source to N1, and another voltage source to the gate of Q5. These two voltages are not unrelated, as the current through Q5 is related to the current through Q1L and Q2L. There are various ways to generate these voltages, and hooking the gate of Q5 to N1 accomplishes that.

Think about it like this: if the current through Q5 increases a bit, then its gate voltage increases a bit, then the Vgs of Q1L/Q2L decreases a bit, so the current through both of them decreases a bit, so the current through Q5 decreases a bit. This means that there is some sort of negative feedback there, and the circuit "stands" on its feet.

The actual current flowing there depends on the characteristics of the mosfets, and their physical size.

The CMOS inverter is a bit trickier. As you say, that one is usually seen as a digital circuit, but here you have it connected to an analog output. Now grab your analog designer glasses, and look again: the CMOS inverter is an analog circuit, with an extremely high gain, and of course it also inverts the signal. In open loop, as drawn in your circuit, it does not do much good from the analog perspective, but what if you close the loop? Remembering that it inverts, you can connect the output of the amp above to its non inverting input, and you just made yourself a pretty decent buffer.

Remember, it is usually easier to make a non linear circuit, make it gain a gazillion, close some feedback and make it behave. This is especially true if you need a precise gain, it is usually quite difficult to have precise gain in open loop, you need to close the loop with passives, that can be made or chosen much more accurately than mosfets.

• So now whats Common Mode and differential Mode gain of this Cmos diff Amp inverter ? Jan 5 '19 at 12:30
• i mean it probably is gm(ro2||ro2L) for first stage but what about second stage ? is it gm4(ro4||ro3) ? Jan 5 '19 at 12:33
• The second stage only has "gain", no CM or DM gain since the input is single ended. The gain of the second stage, when it is linearized in a "good" point, should just be gm * ro, if the two mosfets are identical. Jan 7 '19 at 12:22