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When connecting GPIO output pins (RPi, uC, ...) to an opto-isolator, the classical way I know is the following (at least I understand that it can roughly be depicted like that):

schematic

simulate this circuit – Schematic created using CircuitLab

This will, obviously, lead to the GPIO pins driving the opto-isolator's internal LED (in this case ~18mA). Depending on the amount of used pins, the total current allowed by the uC may be exceeded.

What if I was connecting the GPIO pin in the following manner:

schematic

simulate this circuit

For the sake of the question let's assume that both +3.3V are exactly +3.3V. The idea is to use inverse logic: if the GPIO is HIGH, both ends of the internal LED are on 3.3V, therefore no current is flowing and the opto-isolator is off. With GPIO LOW it connects to GND and therefore current is flowing through the opto-isolator, opening the 24V side as well. The advantage would be that the external power supply is driving the opto-isolator while the uC only has to sink the current.

Will this work? Is it even possible to have current flowing into an output pin while this is set to LOW? Or are there any internal resistors preventing this (specifically with an STM32F207 on a Nucleo-144 board 1)?

Also: will it even make a difference in terms of maximum allowed current? Is current flowing in taken into account just as current flowing out?

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Your idea is fine, but both schematics have fatal errors.

In the first one, when the GPIO output goes low it attempts to put a dead short across the system 3.3 V supply. There are two ways to correct this.

1) (IF the GPIO emitter is connected to GND internally) Leave R1 connected to Vcc; disconnect opto pin 2 (hopefully the LED cathode) fron GND and connect it to the GPIO collector.

2) (IF the GPIO emitter is brought out to the pin and the collector is connected to Vcc internally) Connect the left side of R1 to the GPIO emitter.

The only problem with the second schematic is the connection between the opto pin 2 and Vcc. Again, this creates a dead short path through the GPIO driver transistor. Break that connection leaving pin 2 connected only to the GPIO collector or drain, and it should work. Many GPIO pins are better at sinking current than sourcing, so this is the preferred way to drive an external load.

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  • \$\begingroup\$ Uh, good point (for I need to make the schematics clearer): The +3.3V connected to the GPIO directly is not the system supply, but the uC's internal power supply (with some diodes, resistors, ... in between). So there should be no short between Vcc and GND. Thank you for the last paragraph, which answers my question. \$\endgroup\$ – Dante Jan 8 at 9:24
  • \$\begingroup\$ Glad it works for you. Please mark my post as having answered your question. I get points, and it is marked on the postings list as having been answered to save other people time. \$\endgroup\$ – AnalogKid Jan 8 at 14:26

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