I'm currently working on my thesis project on making a secure pendrive.

For that I have to design an USB protocol implementation on an FPGA.

But I don't know how to physically connect that USB core implementation on the FPGA to a PC. It always failed in that enumeration process (UTMI part is what I have designed but I don't know whether that works).

The PC does not detect my fpga after connecting it with a cable.

After searching a lot and discussion with industry people, what I got is that we can only check USB on simulation part not physically implement

So my question is their any way

  1. we can physically check it on fpga by sending file from pc to fpga.
  2. any usb host shield are available which can handle that enumeration process.

I have gone through one site and I have posted their approach. But that doesn't work. I added that link below http://www.xess.com/projects/fpga-usb-v2-project/

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  • \$\begingroup\$ Welcome to EE.SE! Keep in mind that "Is it possible ...?" is a yes/no question. In this case, the answer to both questions is "Yes". If you're asking us to design it for you, that would be too broad. You would need to specify something about the level of performance you expect as well as what constraints you have on the implementation. What is your specific question? (BTW, this question references a similar project.) \$\endgroup\$
    – Dave Tweed
    Jan 7, 2019 at 16:59
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    \$\begingroup\$ This is not a student-level project. This is a 2-year project for a team of 3 professionals who already know what USB and UTMI is, how to make a USB mass-storage class device, and how to handle flash memory. I don't know what kind of professor could formulate a project like this for a fresh student, even at PhD level. \$\endgroup\$ Jan 7, 2019 at 18:05
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    \$\begingroup\$ @Ale..chenski A highly optimistic -- or sadistic -- one? \$\endgroup\$
    – user39382
    Jan 7, 2019 at 19:15

1 Answer 1


Slow down.

There's a long way from implementing USB HID (which is really typically only USB1, and by far the simplest USB profile) and a full/high/superspeed storage medium interface.

What you present in effort doesn't look like you're getting close to a working solution. So, re-evaluate your choices:

Depending on the USB standard you want to support, you will need an external PHY – just because you can run USB1 HID with bare access to the USB lines to your FPGA doesn't mean that'll work at higher speeds, which you will undoubtedly want for a storage device.

So, you will need something external to speak USB, electrically.

If you're buying an external IC anyway, you should simply buy something that does all the USB handling, and implementation of the necessary state machines for a storage device, for you. It's not lazy, it's the right thing to do!

Then, instead of attaching flash memory directly to that controller, you attach your FPGA, which "hides" the actual memory behind a cryptographic interface (or whatever you're doing).

The Cypress FX3 would probably be what you want. That way, you can concentrate on the secure part, and need not implement a humongously complex standard like USB, which, I'm sad to say, even companies like Xilinx themselves get wrong.
There's little chance you'll write a good USB implementation in a student thesis, and there's also no real benefit: no sane person would do that, but try to buy hardware that takes the effort of handling USB from one's shoulders.

With something like the Cypress FX3, you could offload the USB handling to the Cypress IC, and just use the parallel ("GPIF") bus to talk to your FPGA. I know several very high-rate products that do exactly that.

  • \$\begingroup\$ Sir thanks alot i m also so confused in buying separate hardware but you clear all my doubt. \$\endgroup\$ Jan 7, 2019 at 17:14

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