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The necessity of vertical and horizontal front and back porches in analog video seem fairly intuitive to me, but why are they necessary for digital video at all? In this LCD module data sheet and this NXP presentation, the front and back porches are referenced, but their necessity is not explained.

I am assuming it doesn't take any more time to move a pointer from one pixel to the next adjacent than to move it to pixel (0,0) for the beginning of the next frame.

What am I missing here?

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    \$\begingroup\$ Baseless speculation: It is conceivable that some (probably older) systems might use off-screen scratch space for out of band data such as "closed captions" (subtitles). \$\endgroup\$ – Wossname Jan 9 at 18:25
  • \$\begingroup\$ Interesting. Another thought: an old-timer I work with thought it might have something to do with the possibility of using an otherwise digital video system to drive an analog display. \$\endgroup\$ – schadjo Jan 9 at 18:37
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    \$\begingroup\$ That would entirely depend on which digital video scheme. Of course any will have framing information of some type and most will devote some bandwidth to metadata. \$\endgroup\$ – Chris Stratton Jan 9 at 18:45
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I don't know if there are any TFT panels with LVDS interfaces that can work with zero porches, but usually they require at least some amount of non-active video pixels between active lines to know which pixel is first in line and long enough non-active period to understand which line is the first line. They do not use horizontal and vertical sync signals, but only data enable signal. With HDMI and SDI signaling, the timings exactly match timings of analog CRT systems as they were developed from analog interfaces. They both use the non-active pixel time to transmit audio channels and other metadata, and if there was not enough time between video lines this would not be possible. Also, by having selectable inactive time between lines, they can achieve compatibility with many different frame rates with identical pixel clock, rather than using separate pixel clock for say 24Hz and 30Hz vertical rates. On the other hand, interfaces such as DisplayPort have fixed link rate and it transmits video data in small packets, but the video data itself can have less inactive time when using VESA reduced blanking than with CEA standard video formats.

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