I am using the Altera Quartus II PinPlanner to enter all my pin details for my FPGA design. Some of the pins are connected to the SPI configuration bus of this ADC.
As can be seen on page 8, the 3 pins
SEN must be driven at 3.3V. Now the pin planner gives me three different 3.3V options:
- 3.3V LVCMOS
- 3.3V LVTTL
- 3.3V PCML
Which of these I/O standards should I use for my ADC?