# (Lack of) Miller Effect in Cascode considering Common Emitter and Common Base Seperately

I'm currently working on an analysis of a standard Cascode circuit, in particular why the frequency response is so good as it reduces the miller effect.

I have had a very vague explanation given to me that the node between T1 and T2 acts as a virtual ground in small signals as the voltage at this point 'stays almost fixed' so that there is no gain across the C_cb. I have spent ages trying to see why from the small signal circuit, but we have only been taught h-parameters, whereas a lot of online assistance uses hybrid-pi(?) which has just confused me even more. Similarly nowhere seems to deal with the capacitance between the Collector and emitter. These are all the capcitance that I am aware of that I need to consider:

So instead I was inspired by a different approach I found online to consider the Common Emitter stage and the Common Base stage separately, which gets me close to the right answer but I can't justify why there is no Miller effect between the two stages. i.e. consider the circuit as follows:

First looking at the Common Emitter stage the gain is given by:

$$\G_{CE}=\frac{r_e}{r_e+R_E}\$$

Which is great, the gain is -0.04 (i.e. inverting) so there isn't much Miller effect, we have the input capacitance which is $$\C_{be}\$$ and $$\C_{cb}\$$ when referred to ground as: $$\C_{in}=C_{be}(1-\frac{R_E}{r_e+R_E})+C_{cb}(1+\frac{r_e}{r_e+R_E})=0.04C_{be}+1.04C_{cb}\$$

Which is exactly what was expected in the answer for the input.

Similarly we have the gain of the common base stage as 200 (non-inverting), given by: $$\G_{CB}=\frac{R_C}{r_e}\$$

Which provides an overall gain of 8, again great exactly what we are looking for. Similarly the output capacitance of the common base stage with everything referred to ground is (note $$\C_{oe}\$$ is the capacitance between the collector and emitter - that seems to be notation that is different everywhere I have read too?):

$$\C_{out}=C_{oe}(1-\frac{r_e}{R_C})+C_{cb}\approx C_{cb}+C_{oe}\$$

since the base-collector capacitance is already referred to ground in the smaller signal model.

Makes sense, wonderful stuff.

## The real problem

HOWEVER, the problem is looking at the stage BETWEEN the common emitter and common base stages where the intervening capacitance is (by looking at the output cap of the CE amp and input cap or CB amp):

$$\C_{mid}=C_{oe} + C_{cb}(1+\frac{r_e+R_E}{r_e})+C_{be}+C_{oe}(1-\frac{R_C}{r_e}=26C_{cb}+C_{be}-198C_{oe}\$$

I believe $$\C_{mid}\$$ exists from breaking down the hand drawn circuit image at the start. First of all we have the following diagrams considering all the capacitances including those between input and output (any capcitances between common terminals have been referred to ground already): (apologies for two seperate images but they are meant to be in series with one another)

Each of the capacitances across the amplifier terminals can be referred to ground using the Miller theorem like so:

The high frequency cut offs are going to also depend on the thevenin resistances associated with each capacitance which for in, mid and hi, will just be the R_in, r_e and R_out respectively, so while the capacitance in the middle is going to be much bigger than the other two, is has considerably smaller resistance associated so will not be the limiting factor.

First of all - is that the correct justification to make?

Secondly - does the negative capacitance in the middle make sense? I appreciate you can get negative impedance converters, but can the miller effect cause a negative capacitance since the gain of this stage is non-inverting? I have seen a lot of conflicting information about whether the Miller Effect applies to non-inverting amplifiers without any justification either way, but to me since the Miller theorem is used in the function of the Negative Impedance converter circuit it makes sense that it would also cause a negative capacitance from the miller effect from non-inverting amplifiers?

If you take typical values of the different capacitances as C_be = 22pF and the others being ~ 2pF then C_mid = -324pF.

With the cutoff frequency calculated using:

$$\f=\frac{1}{2\pi RC}\$$

Does it still make sense to just take the absolute value of the capacitance here?

EDIT: The specific performance of the circuit above is largely secondary as it was the circuit we were analysing in the question, I just included it for typical values to help explain my reasoning.

• Welcome to EE.SE. The short answer is that cascode designs isolate the capacitive loading at Vo from the collector of T1. T2 effectively boost the voltage gain of T1 at higher frequencies. In practice T1 is usually an FET, audio or RF, so it needs help to drive a load. In professional audio amplifiers T2 also acts to divide down the high rail voltages so T1 collector only sees about 1/2 Vcc or 1/2 Vee. Vcc/Vee could be as high as +/- 120 volts for a 5,000 watt amplifier. A cascode design solves many problems, compared to a single transistor trying to do all the work. – user105652 Jan 12 '19 at 1:09
• I don't understand your arguments under the real problem heading. I admit I don't follow the meaning of "the stage BETWEEN" and the rest just falls apart. I can't get to your starting point so I can't evaluate the remaining logic and point out any errors. (Sound reasoning is agreed and understood axioms followed by valid logic. I can't get your axioms, so I can't tell if the logic following it is valid. I can tell your conclusions don't make sense, though.) Perhaps you could try a different approach? All I can do is take a new start, ignoring what you wrote. But others already did that. – jonk Jan 12 '19 at 19:37
• Thanks for the feedback, have included some more diagrams which may help explain what I am trying to get at. – falcoso Jan 12 '19 at 22:53

To be able to see why there is no Miller effect in the Cascode circuit. First, you must understand that the Miller effect occurs only in inverting amplifiers and when the capacitor is connected between the input and the inverting output.

Miller's Theorem - Input Capacitance

How does a Miller cap physically create a pole in circuits?

Now let us back to your amplifier circuit. From the AC signal perspective, the situation will look like this:

Notice that $$\C_O\$$ capacitor shorts $$\T_2\$$ base to GND.

$$\T_1\$$ transistor gain is:

$$A_{V1} \approx -\frac{r_{e2}}{r_{e1}+R_E} \approx -\frac{50\Omega}{1.2\textrm{k}\Omega}\approx 0.04 V/V$$

Therefore $$\C_{BC1}\$$ is multiplied by a factor of $$\1\$$, hence no Miller effect.

The CB stage voltage gain is large ($$\ \large A_{V2} \approx - \frac{R_C}{r_{e2}} \approx \frac{10\textrm{k}\Omega}{50\Omega} \approx 200V/V\$$) but because of the fact, that the $$\C_{BC2}\$$ is not connected directly between the amplifier input and output no Miller effect this time also.

For the AC signal $$\C_{BC2}\$$ is connected between $$\T_ 2\$$ collector and GND, hence no Miller effect.

• What is the explanation for the Miller effect only applying to inverting amps? As the Miller theorem is what is used to create a negative impedence converter which is just a more general version of the effect no? Similarly, are there not also capacitances between the other transistor terminals? (I had added additional images to my post to help explain the capacitances I am referring too) – falcoso Jan 12 '19 at 22:56
• The Miller effect is a special case of the Miller theorem when the impedance element (connected between the amp's input and output) is a capacitor. Additional only in inverting amplifier the output is phase shift by 180 degrees (negative feedback). Therefore when the voltage on one side of a capacitor is changing by ΔV the other side of a capacitor the voltage is changing by this amount -A*ΔV (in the opposite direction). – G36 Jan 13 '19 at 8:06
• I forgot to add that Coe capacitor is a positive feedback capacitor and can cause instability at HF. And we can neutralize the stray capacitance by the help of a negative capacitance. But Coe (Cre) is very low and normally we do not include it in the calculations because in the practical amplifier the frequency response will be dominated by Cbe and Cbc. Also, Cbe capacitor is reduced in Emitter Follower amplifier (Av = 1V/V). – G36 Jan 13 '19 at 9:24
• I was taught that Cbe and Coe were of the order of pF each, is this not correct then? And if Coe is small, I am right in including it as I have but just because its size is so small it doesn't actually have a limiting effect except at very high frequencies? – falcoso Jan 13 '19 at 19:04
• Cbc capacitor value can be found in the datasheet. Cbe we can find using FT value from the datasheet and this equation $\large C_{BE} \approx \frac{1}{2 \pi F_T *r_e}$. And Cce is usually extremely small and is generally ignored since the input capacitance is so much larger. – G36 Jan 13 '19 at 20:07

The real problem is the Miller Capacitance, Cm has great affect when your source resistance is too high. Here Zs=100k when it should be more like the base impedance of T2.

Then how much of that current goes into base ( ratio=k) gets amplified reduces the gain further from negative feedback with gain, depends on impedance ratios of source and input to base .

Zin of T1 looks to be around 100k, so at low f you lose 50%, but worse the pole time constant ( or inverse LPF breakpoint) is T=Cm*(Zin//Zs) is too big. ( where $$\ω_{-3dB}=1/T\$$)

Meanwhile the T2 Zbase is shunted by C0 so Cm feedback current is shunted off so no negative feedback and just its just collector capacitance T=Cm Rc instead of T=k hFE Cm Rc because the Miller feedback current is amplified into the base in T1.

k is some impedance ratio that splits feedback current into the bias R's and Base impedance.

Effectively you can get up to hFE more bandwidth but voltage gain is still only Av=Rc'/Re' , the equivalent impedances on each node collector and emitter respectively.

Changes I might suggest are;

• 100K to 1k or 50 Ohm
• 1.8M to 800K
• 1.2k to 0.4k

For a gain of 25.

simulate this circuit – Schematic created using CircuitLab

There is also some capacitance documented by Miller in his 1920 article on the output of a tube or Collector emitter, but it has a much smaller effect than the feedback capacitance which sees a higher impedance and current gain.. Meanwhile the common base which has a much lower input load impedance on T1 collector and it is unity gain.

• Thanks for this, This part I understand, but would there not be a Miller capacitance between the emitter of T2 and vout that isn't isolated? As it is connected directly between the input and output terminals of the common base stage, and the high voltage gain of the common base would greatly amplify this capacitance by the Miller effect (see calculations for C_mid) – falcoso Jan 12 '19 at 10:54
• The common base, T2 has only unity current gain so the voltage gain of Rc/Re comes from T1 yet the cascode T2 isolates the feedback capacitance of T2 away from the base of T1. – Tony Stewart EE75 Jan 12 '19 at 18:40

Miller Effect is a huge consumer (wasteful) of precious high-frequency input signal energy.

Consider this

simulate this circuit – Schematic created using CircuitLab

With the Miller Effect (aka Miller Multiplication), the input capacitance is 1,600pF and the input bandwidth is 100,000Hz with a 1Kohm Rsource.

Is this circuit were converted to Cascode, the input capacity would be about 20pF, and the input timeconstant is 20 nanosecond, or about 6MHz.

• I understand what the Miller Effect is and its effect on the cut-off frequency of the circuit, but I'm trying to analyse the Cascode circuit to analytically explain the reduction in Miller Effect – falcoso Jan 12 '19 at 13:34
• Did you look at the 2 arrows coming from the left, and the 2 text statements that start the arrows. I put those there, for you to read. Notice how the polarity is important (I just added that, sorry the original didi not have the polarities). Something like that "159X" is the formula you seek. I want to read your final math, to see how far I am off. – analogsystemsrf Jan 14 '19 at 5:18