Is it possible to implement basic DSP (such as an FIR Filter) on a Cortex M0 or is the architecture too limited?
Yes you can. An FIR filter is essentially a cascade of multiplication, addition and registers
y[n] = b * x[n] + b * x[n-1] + b * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
What makes Digital Signal Processors (DPS's ) so attractive for this type of operation is a lot of optimisation effort went into providing a platform best suited for Digital Signal Processing.
So can such algorithms be implemented on non-DSP platforms? of course. You can implement them in Excel if you so wish and you have a need to post-process data. The time to execute such filtering algorithms may present a bottleneck in your uP designs and this is where tradeoffs in implementation is required
Of course you can. You can implement any kind of DSP on a Cortex M0. Practically it will depend on the size of your filter (ie. RAM usage) and required speed (if it is real-time). Of course the implementation will have to be fixed-point, as M0 does not have a floating-point unit (so floating point operations are slow).
I recommend using CMSIS DSP which is a DSP library provided by ARM and optimized specially for their cores.
I once implemented an adaptive least-mean-squared filter algorithm on a 16-bit processor running at 3 MHz, so yes of course you can.
Now, if you had given us information about the filter size and sample rate we might have been able to give a better answer.