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According to Moore's law, transistors are getting double every 24 months. But now, we have reached the transistor size limit which results in leakage current. Then why can't we increase chip area size, so that we fit more larger transistors?.

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    \$\begingroup\$ You can to a degree, but the probability of a defect increases and reduces yields driving up cost. Also things like supplying power and cooling become more challenging, and you may need more interconnect to make sure of all those transistors. If the problem can be solved with multiple moderate sized chips (that are also made/sold for use alone), that tends to be more economical than one abnormally huge one. \$\endgroup\$ – Chris Stratton Jan 14 '19 at 6:21
  • \$\begingroup\$ You don't even need the "that are also made/sold for use alone" part. AMD ThreadRipper uses multiple dies to sidestep yield issues, but those dies are not sold individually. \$\endgroup\$ – MSalters Jan 14 '19 at 10:25
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why can't we increase chip area size

You can but then cost goes up and yields can go down. Cost/performance ratio is the bottom line and area is a big cost driver. So the trend is less power per core with more cores and going towards vertical layouts to increase density. But that presents crosstalk issues. 18 layers have been analyzed in some papers.

Although lithography reduction had hit some yield issues on 12nm at Intel, for lower CPU voltage and lower heat dissipation, the progress in the last few years has not been for higher speed but rather larger wafers and more transistors per square mm.

The chip size had hit a power wall at 150W/cm² for heat flux removal which is almost as much as a nuclear reactor. But don't worry, they will find vertical density ways of improving it. The power dissipation decrease with chip capacitance P=nCV²f for n transistors with switching capacitance, C operating at a clock rate of f on a supply of Vdd. I recall some research indicated an optimum power with a Vdd of 0.35V below and above it rises to maintain adequate noise margins.

Pollack’s Law:says Processor performance grows with sqrt of area, so vertical is one way to improve but heat dissipation degrades.

But then parallel CPU's do not always translate to faster performance on a large application as the present Operating systems tend to limit the sharing of N core CPU's to 1/N on average per application unless it is part of the operating system. So an 8 core CPU never uses more than 12.5% of all the CPU's usage on average per application, meaning a 2 core of the same CPU and RAM clock speed and size could perform at 50% of both, better on a single application if all other services and apps were disabled which never happens unless it is highly tweaked. But then this is not feasible in many cases as there is certainly more than 1 task running at any given time. You still need security and background OS maintenance. The OS's have been getting more hungry for scanning files and registry values to keep up to date with multi-tasking shared values. The GUI has become a resource hog. Security apps are as bad as trojans were for robbing CPU performance and better left to security gurus who know how to have minimal but adequate intrusion detection.

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