I'm looking for a clock synthesizer IC that can drive my vintage 5V NMOS CPU in the range of 5 - 50MHz. The granularity would preferably be in the range of 100kHz or less. All I can find when searching the net are contemporary devices that have their lowest frequencies too high, and their output levels too low.

Any suggestions to current or legacy chips that could meet my demands are most welcome. I could even accept a complete circuit built from a small number components (due to restricted PCB estate), as an answer.

  • \$\begingroup\$ Even if there are no such a "contemporary" devices, in the world of electronics it is not uncommon to find stocks of 20-30 old devices. \$\endgroup\$ – Eugene Sh. Jan 14 at 18:20
  • \$\begingroup\$ Getting 50 MHz out of discrete TTL logic chips was quite tough in the TTL era. Care to elaborate what kind of "not contemporary" synthesizer do you have in mind? \$\endgroup\$ – Ale..chenski Jan 14 at 21:13
  • \$\begingroup\$ You're right. I was probably too ignorant to assume there were such devices back in the days. I guess one had to make due with a 4046 and a bunch of counters... :) \$\endgroup\$ – Eriond Jan 15 at 19:08

You can use a Silicon Labs synthesizer chip such as Si5351 (there may be more appropriate part selections). It's not 5V so you'll also need a voltage translator chip and something to program it over the I2C interface and a 3.3V regulator if you don't have one already.

You can get down to < 10kHz up to more than 50MHz with a 27 or 25MHz crystal, or you can use an external oscillator timebase in the 10-100MHz range.

Here is the frequency plan for a 27MHz crystal timebase and a 5MHz output as an example:


Input Frequency (MHz) = 27.000000000

VCO Frequency (MHz) = 810.000000000

Feedback Divider = 30

SSC disabled

Output Clocks

Channel 0

Output Frequency (MHz) = 5.000000000

Multisynth Output Frequency (MHz) = 5.000000000

Multisynth Divider = 162

R Divider = 1

PLL source = PLLA

Initial phase offset (ns) = 0.000

Powered down = No

Inverted = No

Drive Strength = b11

Disable State = Low

Clock Source = b11

  • \$\begingroup\$ Thank you. This was pretty much what I had in mind. Wonder why Google wouldn't show me this option? This device plus some level converters will surely suffice. \$\endgroup\$ – Eriond Jan 15 at 19:06

You can easily find "any" logic level VCO that operates from 5 to 50MHz and then you can control it with a tiny trimpot to find the max rate at some Vcc voltage or CPU temp and decide what is optimum by cooling, adjust Vcc or VCO clock or make one.


enter image description here


simulate this circuit – Schematic created using CircuitLab

5~50 MHz 1.5 to 5.5V Astable Multivibrator using Schmitt trigger Inverter

The clock f depends on RC values not the supply voltage as the ratios are fairly stable from 1/3 to 2/3 of Vcc. So 5V is no problem. Buffer current needed = TBD. This one is 32 mA.


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