I asked to design a sequential circuit with 3 state buffer so when :

Load = 1 -> put data into output

Load = 0 -> don't change output

Here is my design:

enter image description here

But question said also use other gates.

Is this design wrong?

  • \$\begingroup\$ Please use the built-in schematic editor. \$\endgroup\$ – Eugene Sh. Jan 14 at 18:18
  • \$\begingroup\$ define tri state output control and input latch controls either edge or state controlled Output must have 3 states and 1 input and 2 controls \$\endgroup\$ – Sunnyskyguy EE75 Jan 14 at 18:34
  • \$\begingroup\$ I'm sorry but I can't understand, all I know about 3 states buffer is that when ctrl is on they will work and otherwise they will cut off the branch \$\endgroup\$ – Me. Jan 14 at 18:44
  • \$\begingroup\$ @Eugene sh. I don't know how to use them but I'll try to learn, thanks : ) \$\endgroup\$ – Me. Jan 14 at 18:49
  • \$\begingroup\$ Please tell us exactly what the question said. What does your instructor want from you? \$\endgroup\$ – Elliot Alderson Jan 14 at 19:26

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Browse other questions tagged or ask your own question.