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By looking at the Ebers-Moll equation for a BJT transistor:

enter image description here

Is this formula explicitly showing why Ic starting to decrease towards zero in saturation region. Which part of the equation shows that?

enter image description here

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    \$\begingroup\$ Read the wikipedia page: en.wikipedia.org/wiki/… there it states: The DC emitter and collector currents in active mode are well modeled by an approximation to the Ebers–Moll model so....? What is said about saturation mode? \$\endgroup\$ – Bimpelrekkie Jan 15 at 14:22
  • \$\begingroup\$ Please see my edit. I plotted Vbe versus Ic. After some point for Vbe, the Ic starts decreasing. In that region does the Ebers Moll still hold or we should look at transistor as nothing but a point? Vbe is V(N003,N004) which is the axis on the plot. \$\endgroup\$ – atmnt Jan 15 at 14:39
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    \$\begingroup\$ How can you be sure that the transistor you're using in your simulator only uses the E-M equation you listed above it? Typically different equations are used as the transistor enters saturation mode. The discontinuity at Vbe = 798mV sort of hints at this. \$\endgroup\$ – Bimpelrekkie Jan 15 at 15:31
  • \$\begingroup\$ The full Ebers-Moll, level 1 (they wrote more, later on, so there is also a level 2 and a level 3 set of models) is disclosed here on this EESE site. Your equation isn't Ebers-Moll. It's just one equation of several within the injection version of it (itself, only one of the three forms of level 1.) And why isn't it obvious to you why the collector current can decline like that in your circuit. Add your base and emitter current curves, for example. \$\endgroup\$ – jonk Jan 15 at 18:04
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As has been pointed out, no part of Ebers-Moll will explain your effect. Ebers-Moll explicitly deals with linear operation, not saturation.

However.

You should note that, for voltages above 798 mV, the transistor is not in saturation.

For instance, at V = ~824 mV, current is 1 mA. This means that the voltage across R1 is only one volt, which means 4 volts across C-E and R2. Since the base voltage is 824 mV, the maximum possible voltage across R2 must be less than one volt, and there must be at least 3 volts across the transistor. With Vce greater than Vbe, the transistor is, by definition, not in saturation.

What is going on in the simulator model - I have no idea. But you've clearly found a mode where Something Is Wrong. I suggest you rerun your simulation with voltage and current meters on every node.

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