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Say I have a simple non-inverting amplifier op amp application as shown. The input signal is far from the rails. Now say the +12 and -12 V supplies are not ideal DC, but rather have lots of ripple or noise, causing them to go anywhere from +/- 12-13 V. What effect would this have on the output signal quality? Would this affect other applications? (again, the input signals not in danger of reaching the rails)

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  • \$\begingroup\$ Google search term: power supply rejection ratio (PSRR). \$\endgroup\$ – mkeith Jan 17 '19 at 5:32
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Yes, look up power supply rejection ratio (PSRR).

Vout_ripple = Vsupply_ripple/PSRR

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    \$\begingroup\$ And note that PSRR generally falls with increasing frequency, it can be getting remarkably poor by the time you hit 10% of GBP in some cases. \$\endgroup\$ – Dan Mills Jan 16 '19 at 21:18
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The excellent PSSR is due to the use of constant current sources internal to the design. 3 OA config. Instrument Amps (IA) tend to be better by more than 20 dB useful for < 1mV signals.

Signal error is also reduced by the Av*f/GBW due to Proportional error feedback residual gain.

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Decades ago I used a UA741/similar, in a modem with a matched filter. The stabilized amplitude NRZ/Biphase signal into the filter had lots of 10% or 20% upsets that were synchronous to the bitstream.

Turns out the UA741, because of how the feedback compensation capacitor is placed between internal nodes of the silicon transistors, has almost ZERO power supply rejection OF NEGATIVE RAIL (-15v) for frequencies above 1KHz.

Look at datasheet PLOTS for PSRR. Be sure the VDD- behavior is similar to the VDD+ behavior.

Here is real-world schematic for a power-supply filtering circuit, including some very-high-frequency RC filtering out at 1GHz by PCB foil resistance PCB trace area.

schematic

simulate this circuit – Schematic created using CircuitLab

Next are 3 frequency responses. The leftmost is the filtering of the schematic above. The middle shows a typical OPAMP PSRR plot. The rightmost shows the effect of combining the filtering with the PSRR; notice the ugly peaks and valleys between 10 and 100MHz, caused by ESL inductive parasitics of the capacitors; these frequencies are where the typical Switching Supply has lots of ringing because of internal parasitic L and C (and PCB effects).

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This frequency response shows how the filtering will attenuate high-frequency trash from a Switching Power Supply. Notice the minimal filtering down at 60/120Hz. If you simulate this, and you reduce the 2 resistors from 1 ohm to 0.01 ohm, you will see the low frequency filtering goes away, and you are totally dependent upon the OPAMP PSRR.

How to remove, or at least reduce, these peaks at 10 and 20 and 30 and 100MHz? You need to DAMPEN the stored energy. Thus 0.1 ohms in series with the capacitors ----- is one approach.

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