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In many schematics, we have two capacitors connected in parallel to a crystal? Why do we have capacitors parallel to crystal? Whats the purpose? How are the capacitor values determined ?Capacitors parallel to crystal which are given to micro pins

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marked as duplicate by Ale..chenski, ThreePhaseEel, RoyC, Andy aka, Finbarr Jan 21 at 0:01

This question has been asked before and already has an answer. If those answers do not fully address your question, please ask a new question.

  • \$\begingroup\$ Welcome to EE.SE. An example diagram or schematic would be very helpful. There are series, parallel and a capacitor on each end to ground. Please be more specific. \$\endgroup\$ – Sparky256 Jan 19 at 4:38
  • \$\begingroup\$ I have attached the schematic portion images where the inputs of the cystals are given to the micro \$\endgroup\$ – Electronic_Maniac Jan 19 at 4:51
  • \$\begingroup\$ This question has been asked many times here. Here is another one, electronics.stackexchange.com/q/250608/117785 \$\endgroup\$ – Ale..chenski Jan 19 at 6:48
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The capacitors are effectively in series with each other and the combination is in parallel with the crystal. The total "load capacitance" is thus (ignoring the oscillator circuit and stray capacitances)

\$C_P= \frac{C_1 C_2}{C_1 + C_2} \$

In a typically microcontroller or similar circuit there is an amplifier input connected to one side and a current amplifier output connected to the other. Both have a bit of additional capacitance that adds to the load. It's called a series resonant circuit

The oscillator is called a Pierce Oscillator.

There are two things that help you determine the value. First there may be suggested or limit on the maximum capacitance from the microcontroller or chip manufacturer. Best stay within that or your oscillator may not start reliably. Secondly, you would like, for maximum accuracy, to match the specified load capacitance on the crystal datasheet. That means taking into account the input, output and stray capacitances. The effective total load on the crystal is:

enter image description here

So you want to pick C1 (usually = C2) such that CL is close to the number on the crystal datasheet.

In general, it's not that fussy usually and you can use a few pF (like 5pF) for the values of Ci and Co and Cs. Because the crystal itself is a very high "Q" resonator, slight mismatches in the capacitance won't have much effect. If you're trying to keep time-of-day, you may wish to be more fussy and/or adjust the load capacitance, but usually 100ppm either way doesn't make so much difference.

There are enough variables that you may wish to use whatever the recommended crystals are from the chip maker. In general there no guarantee that your oscillator will oscillate otherwise, since chip makers very seldom specify parameters such as transconductance (gm) limits over temperature that could be used to guarantee operation. There is thus ample opportunity for the chip maker to blame you and the crystal maker, and the crystal maker to blame you and the chip maker (the uncomfortable common factor being you).

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Such capacitor topology is used to fine tune the crystals resonate frequency closer to what is on the label. The manufacture of the crystal makes them so they run a very tiny bit fast until you install the capacitors of the specified values. They will then run closer to the 'ideal' specified frequency.

Also these need to be good quality low drift X7R or no drift NPO types. Note that extreme changes in ambient temperature will cause the crystal to drift off the ideal frequency. If very tight accuracy over time is required then crystal oscillators are mandatory. For extreme long-term accuracy TCXO (Oven controlled oscillators) are required.

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  • \$\begingroup\$ And if very tight accuracy over time is needed, then you start getting into the territory of rubidium or caesium frequency references (aka atomic clocks). \$\endgroup\$ – Hearth Jan 19 at 5:17
  • \$\begingroup\$ @Hearth Or a GPS disciplined oscillator. A favorite for any hobbyist level project. ;) \$\endgroup\$ – jonk Jan 19 at 5:24
  • \$\begingroup\$ As I gather it, the parallel mode resonance must be higher than the series mode resonance (the intrinsic self-resonance) and the manufacturer will usually build a crystal, if known to be used in parallel mode, so that parallel mode is closer to the desired 'f'. The capacitors, instead, are there to help force the parallel mode resonance closer to the series mode (say, from being 15 kHz apart to being 400 Hz apart) and this leads to being more resistant to external variations since the series and parallel modes are close by. Memory serving. \$\endgroup\$ – jonk Jan 19 at 5:36
  • \$\begingroup\$ @jonk A GPSDO is still a caesium frequency reference, it's just that the actual reference is in geostationary orbit. At least, I think they're caesium atomic clocks. \$\endgroup\$ – Hearth Jan 19 at 6:22
  • \$\begingroup\$ @Hearth I'm just teasing. In case that wasn't clear. Take a look at the SIZE of those units!! hehe. \$\endgroup\$ – jonk Jan 19 at 7:11
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The capacitors implement a phase inversion

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ This answer is exactly correct, and none of the other answers addressed the inversion property of the PI network. \$\endgroup\$ – analogsystemsrf Jan 22 at 2:21

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