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I am trying to design a PoE solution using MP8007. It has an integrated PD interface and isolated/non-isolated DC-DC Converter.

The DC-DC converter uses fixed peak current and variable frequency Discontinuous Conduction Mode (DCM) to regulate constant output voltage.

I am using it in Buck mode and following the reference circuit given in the datasheet.

enter image description here

The datasheet has input capacitors (C1A and C1B) (47uF and 2.2uF) of voltage rating 100V. These input capacitors are very expensive and large. However, on page 23, the vendor has given a formula to calculate Input Capacitors. For my application, Ilim = 2.68 A, L = 22uH, Vin (min) = 37V and Vinp_p = 0.3V (This is what I have assumed). By using these values, I have calculated the required Input capacitors to be 10uF.

However, the reference design has used much higher input capacitor. I am confused over using calculated capacitor (with some margin) or reference design capacitor values.

The recommended minimum output capacitor is 44 µF and much higher output capacitors are being used in the reference design.

The datasheet says:

Normally, a 44μF or higher ceramic capacitor is recommended as the output capacitor. This allows a small Vo ripple and stable operation.

I am planning to use two 44 µF capacitors (25V). But the values in the reference design are troubling me. Please advise.

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Possibly, the extra capacitance on the reference design is to overcome surge testing to EN 61000-4-5. Although a common-mode test, the applied surge (1 kV or upwards) may not be perfectly balanced by the impedances seen at Vin and Vss and this can easily lead to an excessive differential voltage between them that can blow the pants off the chip. Adding more capacitance between Vin and Vss is a pretty reliable way of limiting this potential over-voltage condition.

That extra capacitance may also be used to prevent over-voltage/current damage to the piddling little TVS across those two inputs (SMAJ58A).

Given that the output may also route out along ethernet wires (via the magnetics), the same is possibly true for the output port and hence extra capacitance is chosen. You cannot rely on ethernet magnetics for offering much of a block to surge voltages by the way.

Of course, other reasons cannot be ruled out (as well as testing to different surge specifications).

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  • \$\begingroup\$ The above converter is configured with I (limit) = 2.68 A (Set via resistor at pin ILIM). DCDC converter works in discontinuous conduction mode (DCM). The second switching cycle will not start until the inductor current drops to 0A. The capacitors C1A, C1B, C2A and C2B should be able to handle that much ripple current. The capacitors C1A and C1B should have voltage rating of 100V. \$\endgroup\$ – abhiarora Jan 24 at 15:33
  • \$\begingroup\$ It's really difficult to find right capacitor. The DCDC converter (in buck mode) will switch to very low frequency under low load. The ripple current rating of many capacitors at very low frequency is very low. Please help \$\endgroup\$ – abhiarora Jan 24 at 15:35
  • \$\begingroup\$ I'm not sure what you are wanting help with? \$\endgroup\$ – Andy aka Jan 24 at 16:00
  • \$\begingroup\$ I am not sure about ripple current requirement for capacitors C1A and C1B. Can you help? It's weird the capacitors are connected between Vin and PGND. I am not sure why it is so. It should be between Vin and Vss. \$\endgroup\$ – abhiarora Jan 24 at 16:07
  • \$\begingroup\$ I would use a simulator and mimic the action of the chip. \$\endgroup\$ – Andy aka Jan 24 at 16:10

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