I'm trying to compare the shot and thermal noise contributions in a MOS transistor.

In the literature, the above-threshold MOS transistor has only thermal noise, which is found by integrating the noise of infinitesimal lengths of the channel that behave as resistors.

Of less importance is shot noise, which is said to appear only in the subthreshold region, so for very small drain currents.

Well, when I model the transistor as in the picture below (thermal noise current instead of voltage to get a direct comparison between the two sources), for \$V_\mathrm{DS}\$ above \$2\mathrm{kT}\$ (about \$50\mathrm{mV}\$), the shot noise current is bigger than the thermal noise current no matter what resistor I use. Thermal noise gets bigger than shot noise only for drain-source voltages below \$50\mathrm{mV}\$. enter image description here

This is not a surprise, since I've found before that the shot-thermal crossover when the voltage is comparable to \$\mathrm{kT}\$ can be used as a very good thermometer: here are some references

From the multiple realizations of shot noise thermometry, if I model the mos transistor in a similar way, it seems that shot noise should dominate at voltages above \$50\mathrm{mV}\$.

  1. Why is it necessary to integrate over the channel to get the thermal noise? Wouldn't dividing the drain-source voltage by the drain current be enough to get the resistance used for thermal noise calculations? Or the differential resistance? In both cases I get a shot noise dominating the thermal one for \$V_\mathrm{DS} > 50\mathrm{mV}\$.

  2. Is it correct that shot noise is a larger contribution than thermal noise for \$V_\mathrm{DS} > 50\mathrm{mV}\$?

EDIT: there's a shot noise limit for tunnel junctions and for mosfets in subthreshold, but for 3N163 at 3K, there isn't. At least not according to this document https://ntrs.nasa.gov/search.jsp?R=19810012750 (Cryogenic switched MOSFET characterization)

  • \$\begingroup\$ FETs are accurately modeled, noise-wise, as resistors having value 2/3 of the transconductance. From what I recall. This is ignoring substrate currents, which RF designer need to also think about; tight groupings of subties may alleviate that contribution. \$\endgroup\$ Jan 20, 2019 at 12:33
  • \$\begingroup\$ That modeling, using the transconductance param, is for operation well above subthreshold (that is, in strong inversion, aka in saturation where the lambda param has some effect on the output I_V plot) \$\endgroup\$ Jan 20, 2019 at 13:04
  • \$\begingroup\$ 1) lengths of the channel that behave as resistors. Usually in practical circuits, a MOSFET is not used as a resistor but as a gm (voltage controlled current source). 2) the 1/f noise of MOSFETs is dominant at low frequencies, often that's below 1MHz. It depends on the circuit configuration. 3) Focus on how you're a transistor (frequency, operating mode) as that can have a huge impact on what noise is dominant. 4) Have you read: nikhef.nl/~jds/vlsi/noise/sansen.pdf and kth.se/social/upload/4f311fb0f27654646c00000d/F7_VT12.pdf ? \$\endgroup\$ Jan 20, 2019 at 13:23
  • \$\begingroup\$ The parameter γ for long devices is interesting, since it basically rules out any additional contribution like shot noise. However, 2/3 is valid only for the saturation region, so it can be interpreted that we consider the zero bias drain conductance for the calculation but the actual conductance in saturation could be drain current divided by Vds? \$\endgroup\$ Jan 20, 2019 at 18:51
  • \$\begingroup\$ This would yield a higher resistance that can account for the decreased current noise, so the parameter γ approaches 1. Another decrease in the noise could be due to the correlations that appear in the shot noise (decreased Fano factor, or the appearance of ballistic conduction). Still, the fact that thermal noise only can account for the total noise in long channel devices is interesting. Are there any practical measurements that confirm the decreased 2/3 noise in long channel devices? \$\endgroup\$ Jan 20, 2019 at 18:51

2 Answers 2


You cannot always assume that a current \$I\$ flowing through a device will result in shot noise. You need to understand that the shot noise arises when a current flows through a potential barrier like from p-doped region to n-doped region in a pn-junction diode.
For a MOSFET in strong inversion region, there is very small potential barrier between source/drain and the channel (because of the positive gate potential) consequently the noise is mostly thermal. In a weak inversion region the potential barrier is higher and in this case, the noise would behave as shot noise.
Also, note that shot noise and thermal noise are related to each other, in the sense that they have similar origins. So if a current is passed through a region with potential barrier, then the noise behaves as shot and if the potential barrier is reduced to zero, the same noise behaves as thermal noise. Refer to:Unified derivation of Johnson and shot noise expressions, AJP (2006).

  • \$\begingroup\$ This is the explanation that I was waiting for, initially it convinced me but now I recall that in saturation the channel is pinched-off near the drain. So now what \$\endgroup\$ Jan 24, 2019 at 0:15
  • \$\begingroup\$ @user10010101 Please see my edits, hopefully makes it clear. \$\endgroup\$
    – sarthak
    Feb 26, 2019 at 9:38

This question has already an accepted answer by sathak: however, I would like to share with other members what I have been able to find by looking in my textbooks and monographs on electrical noise. So, following the questions posed by the OP, here are my answers.

Why is it necessary to integrate over the channel to get the thermal noise? Wouldn't dividing the drain-source voltage by the drain current be enough to get the resistance used for thermal noise calculations? Or the differential resistance?

It is necessary to integrate the noise contribution of each single section of the channel since each of them must be weighted in a different manner, depending on its position along the channel. This is due to the fact that Field Effect Transistor (be it Metal Oxide Semiconductor or Junction) is an active device, therefore it provides amplification for every single electrical signal within its active region, no matter how small it is.
Precisely, let's consider the Johnson-Nyquist thermal noise generated inside each of its "infinitesimal" channel sections: $$ \mathrm{d}v^2(\ell)=4k_\mathrm{B}T\Delta f\mathrm{d}R(\ell)=4kT\Delta f\frac{\mathrm{d}V(\ell)}{I_D}\label{1}\tag{n} $$ where

  • \$k_\mathrm{B}\$, \$T\$ and \$\Delta f\$ are respectively Boltzmann's constant, the absolute temperature of the channel of the device (assumed from here on to be a n-channel MOSFET) and the signal bandwidth considered, as is customary to do.
  • \$\ell\$ is the coordinate of a point taken along the axis of the channel of the device (the geometry of the device is obviously assumed to be simple, for example rectangular in 2d or cylindrical in 3d): \$L\$ is assumed to be the entire channel length.
  • \$V(\ell)\$ is the electric potential of the point \$\ell\$
  • \$I_D\$ is the (stationary) drain current flowing though the device.

If we want to find the contribution of the noise \ref{1}, generated by every single \$\ell\$ channel section, to the total noise at the drain of the device we should perform circuit analysis.
Modeling \ref{1} as an ideal signal generator, we see that this generator has one terminal connected to a common gate MOSFET amplifier, which models the part of the global MOSFET comprised between the \$\ell\$ position and the drain (\$\ell=L\$) and whose characteristics depend on its channel length \$L-\ell\$. The other terminal is connected to the output conductance of another MOSFET, which models part of the global MOSFET comprised between the \$\ell\$ position and the source (\$\ell=0\$) and whose channel length is \$\ell\$. Thus the thermal noise generated inside each region of the device appears at the drain terminal amplified by a gain which is a function of \$\ell\$ and this is why it is necessary to integrate all the noise contributions of each infinitesimal resistive section of the channel. The following schematic could give some insight:


simulate this circuit – Schematic created using CircuitLab

The first to have used this fact in the noise analysis of the JFET transistor seem to have been Aldert Van Der Ziel in [1] (p. 1809): following the development for MOSFET device as offered by Cobbold in [1], §9.3.1. pp. 337-339, we have the following formula $$ \overline{i_d^2}=-4k_\mathrm{B}T \Delta f \frac{\mu^\ast_n}{L^2}Q_n\label{2}\tag{N} $$ where

  • \$\mu^\ast_n\$ is the effective channel surface electron mobility,
  • \$Q_n=\int_0^LW(\ell)Q_n(\ell)\mathrm{d}\ell\$ is the total channel inversion charge, obtained by integrating the channel inversion charge density \$Q_n(\ell)\$ along the channel length with given metallurgical channel width \$W(\ell)\$.

Is it correct that shot noise is a larger contribution than thermal noise for \$V_\mathrm{DS} > 50 \mathrm{mV}\$?

To (partially) answer to this question I must precise that, whenever a current of granular material flows trough the given section of a conductor (or of a tube, a chute and so on) a form of shot noise is nevertheless present. This is due to the fact that this kind of noise is due to the granularity of the flowing media (in this case electrons) and not on the physical properties of the medium through which it flows: in other word, shot noise originates from the statistical structure of the motion of granular materials. In the case of charges, a flows happens between two regions only if there is a difference between potentials (and considering that there are not perfect insulators, the condition could be assumed as necessary and sufficient): this is the basis of the assertion that shot noise appears across potential barriers. This implies that there is shot noise even when \$V_\mathrm{DS}< V_\mathrm{GS} - V_p\$ and its value is always $$ \overline{i^2_\mathrm{Sh}}=2qI_D\Delta f\label{3}\tag{Nsh} $$ with the customary meaning of all symbols.
Now, for a MOSFET we have (Cobbold [1], §7.1.1 pp. 241-242 and §9.3.1 p. 338) $$ I_D=-\frac{\mu^\ast_n}{L}\int\limits_0^LW(\ell)Q_n(\ell)\frac{\mathrm{d}V(\ell)}{\mathrm{d}\ell}\mathrm{d}\ell\label{4}\tag{ID} $$ and therefore using equation \ref{2}, \ref{3} and \ref{4} we get $$ \frac{\overline{i_d^2}}{\overline{i^2_\mathrm{Sh}}}=\frac{2k_\mathrm{B}T}{q}\frac{Q_n}{L \int\limits_0^LW(\ell)Q_n(\ell)\frac{\mathrm{d}V(\ell)}{\mathrm{d}\ell}\mathrm{d}\ell}\label{5}\tag{Noise comparation} $$ As we can see, the limit value $$ \frac{2k_\mathrm{B}T}{q} = 50\mathrm{mV} $$ value appear in the equation for \ref{5}, and multiplies a term whose magnitude is a function of \$V_\mathrm{DS}\$: due to lack of time, I have not been able to estimate it, but it seems plausible that the limit stated by the OP for the dominance of the thermal channel noise on the shot noise can be formally justified.

[1] Richard S. C. Cobbold (1970), Theory and Applications of Field Effect Transistors, New York-London-Sydney-Toronto: John Wiley & Sons, pp. xv+534.

[2] Aldert Van Der Ziel (August 1962), "Thermal Noise in Field-Effect Transistors", in Proceedings of the IRE, vol. 50, no. 8, pp. 1808-1812, doi: 10.1109/JRPROC.1962.288221.


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