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I know there are already questions and answers about P-Channel MOSFETs and power source selection, but I still find myself pretty confused, as many of those are more complex than my circuit or simply connected differently. I'll lay out my design and then list a few questions. Any thoughts would be greatly appreciated!

I'm powering an ATMEGA328P using approximately 5V (so it can run at 16MHz). Normally, it will run on 3 AAAs in series (4.5V total). When I connect a 5V FTDI USB-to-serial board to program it, I'd like power from the battery to be cut to keep from damaging the battery (I don't want to have to put a diode there). I'm planning to use a logic-level P-Channel MOSFET. I expect to draw about 50mA max, but may plan for 100mA just to be safe.

schematic

simulate this circuit – Schematic created using CircuitLab

Analysis:

Vusb range: [4.75V, 5.25V] (per USB standards)
Vbat range: [3.8V, 4.8V] (min needed for 16MHz and max from 1.6V AAA estimated max voltage)

USB Connected:

Vusb    Vbat    Vgs    Expected MOSFET State
--------------------------------------------
4.75V   3.8V    0.95V  OFF
4.75V   4.8V   -0.05V  OFF
5.25V   3.8V    1.45V  OFF
5.25V   4.8V    0.45V  OFF

USB Disconnected:

Vusb    Vbat    Vgs    Expected MOSFET State
--------------------------------------------
0V      3.8V   -3.8V   ON
0V      4.8V   -4.8V   ON

Questions:

  • Are there any glaring mistakes with this design?
  • What's the best way to keep the MOSFET from accidentally opening? I've tied the gate to ground through R1, which seems correct.
  • I've connected Vusb (gate) to VCC (drain), then added a diode to keep the MOSFET from always being open. Is this a correct assumption?
  • Do I need any other diodes on the two power lines? I'd rather not have their voltage drop (otherwise I'd just use a simple ORing diode circuit to get what I want). What circumstances would produce backfeed current into either the battery or USB?
  • I've often seen P-Channel MOSFETs connected the other way around, with the load connected to the source rather than the drain. What's the deal with that? Can current flow both directions? Which is most conventional?
  • I'm planning to maybe use FQP27P06, though it seems most logic-level ones have a compatible Vgs(th) range. Have any better/cheaper suggestions?

Thanks again! I've asked multiple questions on this forum and y'all are always so helpful.

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  • \$\begingroup\$ When the USB is disconnected the voltage at the transistor gate will not be 0, it will be equal to Vcc of the processor. Since you want Vcc to be close to Vbat the result will be that Vgs is close to zero, so the PMOS never conducts. You simply can't connect Vcc to the transistor gate. \$\endgroup\$ – Elliot Alderson Jan 21 at 16:24
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    \$\begingroup\$ The transistor you linked does have a diode from drain to source, so if Vusb is 1.45V above Vbat you will get substantial current feeding back to the battery. \$\endgroup\$ – Elliot Alderson Jan 21 at 16:26
  • \$\begingroup\$ @ElliotAlderson I was in the middle of correcting that when you must have posted. Could you take another look? I simply removed R1 because I'm not sure where to put it... \$\endgroup\$ – menehune23 Jan 21 at 16:28
  • \$\begingroup\$ You need the pulldown to turn the transistor on when Vusb goes away. Worse, your modified schematic has no path for current from Vusb to Vcc. This question gets asked over and over here, try doing a more thorough search. \$\endgroup\$ – Elliot Alderson Jan 21 at 16:30
  • \$\begingroup\$ @ElliotAlderson ah good catch. I missed that. It seems the whole thing is just off because there's no way I can connect the USB to VCC without negative side effects (i.e. MOSFET never conducts). I'll take another whack at it later today. Perhaps this is just the answer I needed, that there is a glaring mistake with the original design. I'll put the R1 back just for clarity. \$\endgroup\$ – menehune23 Jan 21 at 16:47
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I was close, but this seems to be a working circuit, based on this app note for a load-sharing circuit and this SO question. Essentially, I needed to reverse which side of the MOSFET the load goes on. See below:

schematic

simulate this circuit – Schematic created using CircuitLab

Analyzing this circuit...

When USB is connected, Vs = Vg - Vf1 ==> Vg - Vs = Vf1 = Vgs, where Vf1 is the forward voltage drop across D1. Then D1 can be selected such that its forward voltage falls under the Vgs(th) of the MOSFET, keeping it open. If Vgs(th) is about -2V to -4V (based on a typical logic-level P-Channel MOSFET), then we just need a diode with a drop of less than 2V, which is very easy. We also need to maintain as close to 5V as possible for the ATMEGA chip, so a schottky is best, as it can provide less than 1V drop.

When the USB is disconnected, Vg is pulled to 0V, and Vs = Vcc = Vbat - Rds(on)*50mA (for an approximate 50mA current). Thus Vs is close to 4.5V and Vgs ~= -4.5V, and the MOSFET will conduct. Selecting a MOSFET with a low Rds(on) will keep from losing too much voltage. The D1 diode keeps the gate Vg from being equal to Vs at this point, as it will be reverse biased.

Lingering questions...

  • One part that I'm not totally certain of is the scenario when the USB is disconnected: How can I assume that the MOSFET is conducting? It seems that if I start with that assumption, I don't run into any contradictions. Yet, if I assume that the MOSFET is open and Vs = Vg = 0V, then I don't really run into contradictions either. What would Vs be when in this second case? Perhaps someone can clarify? Otherwise, I'll assume that the folks who wrote the app note I'm referring to know what they're doing.

    UPDATE - Answer: When USB is unplugged, Vg = 0V and Vs = Vd - Vf where Vd = Vbat and Vf is the MOSFET's body diode forward voltage drop, usually around 0.65V (note this is typically specified as Vsd on a datasheet and is usually given as a negative number). This puts Vs ~= 3.85V, resulting in Vgs = Vg - Vs = -3.85V. For a P-Channel MOSFET with a Vgs(th) of -2V to -4V, this will activate the MOSFET and cause it to conduct. Once the MOSFET has turned on, the voltage drop from the body diode goes away, and is replaced by the voltage drop from the internal resistance, called Rds(on), so Vs = Vd - Rds(on)*i where i is the expected current through the MOSFET.

    Side Note: Don't be confused by the fact that Vgs(th) is often a range on datasheets rather than a single value. It's totally fine and often desired to be more negative than the "max" for range (e.g. -4V in our case), within the datasheet's absolute max ratings, of course.

  • Is D2 necessary? If I understand correctly, it keeps current from backfeeding into the battery. The app note pictures it and mentions you can buy the MOSFET with it built-in (schottky). I manually added it to my schematic, but is it already assumed? i.e. is it the same or different from the parasitic body diode?

    UPDATE - Answer: It is the same as the body diode of the MOSFET and is not required as an "extra" diode. That said, some have recommended against using it as the only backward-current protection diode.

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    \$\begingroup\$ The source of the PMOS should connect to the higher voltage (Vbat) rather than the lower voltage (Vcc). The symbol is shown correctly but your labels for Vs and Vd are reversed. When USB is connected Vg=Vusb so Vgs=Vusb-Vbat. When USB is not connected Vg=0 and Vgs=-Vbat. You are wasting a lot of power in R1...I would use 1k\$\Omega\$ or so. \$\endgroup\$ – Elliot Alderson Jan 22 at 15:31
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    \$\begingroup\$ D2 is the body diode of the MOSFET; you don't need to add it as a discrete part. Btw that same diode might be important for the proper operation of the circuit at the moment the USB power is removed. It will take some miniscule time for the gate charge to dissipate through R1 (few microseconds probably), but during that time the MCU would only be powered from Vbatt through D2. When Vg gets to 0V, the P-MOS will conduct as expected. Be sure to have some more capacitance on the power supply pins of the MCU, 1µF or so, to cater for such transients. \$\endgroup\$ – anrieff Jan 23 at 2:14
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    \$\begingroup\$ That's correct. Be sure to select a MOSFET with low enough Rds(on) at the Vgs you'd be having - around -4.5V. \$\endgroup\$ – anrieff Jan 23 at 3:00
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    \$\begingroup\$ A silicon diode has a typical forward voltage of about 0.65V, and of course that depends on the current thru it and temperature. The body diode (D2) is one silicon diode. It's exact characteristics in the FQP27P06, can be seen in Figure 4 on the datasheet ("Body Diode Forward Voltage Variation"). But the point is, if your P-MOS is off, Vs cannot be less than (Vd - 0.65V) (if it is, the body diode conducts). If the P-MOS is on, then Vs ≅ Vd (only resistive losses remain). \$\endgroup\$ – anrieff Jan 23 at 16:32
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    \$\begingroup\$ This is of course all greatly simplified and a lot of assumptions are made. I'd recommend you to get a nice circuit simulation tool (Circuit Lab on this site; or Falstad, or LTspice) and simulate the entire thing, I believe a lot of things will become more clear once you see them in action, and visualize the voltages at the various nodes. \$\endgroup\$ – anrieff Jan 23 at 16:35

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