I am not able to understand how diode clamp protection works.

Considering the diode clamp protection as shown in Figure 1: When the input voltage (Vin) becomes more than power supply voltage (Vss = 5V), say Vin = 12V, then the equivalent circuit becomes as shown in Figure 2. But what I did not understand is that the potential difference between the terminal Vout and the ground is still Vin=12V, isn't it? Could someone please explain this to me?

Same question is asked here How does a diode clamping circuit protect against overvoltage and ESD? but I could not understand it and I do not have enough points to ask for clarification comment there.


schematic diagram

  • 3
    \$\begingroup\$ What is missing on your schematic is series resistance, add a resistor in the left branch of the circuit, so in series with Vin. Then in figure 2 the 5 V will drop across that resistor. Without any series resistor the diode D1 would need to carry an infinite amount of current and simply be destroyed. Also ESD protection in ICs relies on some series resistance to be present. \$\endgroup\$ Commented Jan 23, 2019 at 14:08
  • \$\begingroup\$ Thanks @Bimpelrekkie, I have made the modification as you suggested. \$\endgroup\$
    – Ajay
    Commented Jan 23, 2019 at 14:19
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    \$\begingroup\$ Now think what the voltage at Vout is going to be in figure 2. \$\endgroup\$ Commented Jan 23, 2019 at 14:26
  • \$\begingroup\$ @Ajay - Welcome to the site :-) FYI, you don't mean to label the positive supply rail as Vss, as used in your text and diagram. I recommend that you read this previous question (and do some more research yourself) to learn about the meaning of terms like Vss (and Vdd, Vcc etc.). Good luck and, again, welcome :-) \$\endgroup\$
    – SamGibson
    Commented Jan 23, 2019 at 18:53
  • \$\begingroup\$ Thanks @SamGibson for letting me know, I will take care of this in future. \$\endgroup\$
    – Ajay
    Commented Jan 25, 2019 at 13:24

2 Answers 2


\$V_{out}\$ is connected to the 5V supply in Figure 2. This means that the voltage at \$V_{out}\$ must be 5V.

If you are wondering why there is no conflict between \$V_{in}\$ and the 5V supply then the answer centres around \$R_2\$. If you look at the voltage across \$R_2\$ you know that \$V_{R_2}=7V\$ as there is 12V on one side and 5V on the other side. Because of Ohm's law this means that there is a current flowing through \$R_2\$.

A current flowing through a resistor means a voltage drop, the bigger the drop is - the larger the current flowing through the resistor is (and the more energy the resistor will turn into heat as a result!).


When Vin exceeds 5V + Vf of the diode (0.5V to 0.7V), the diode conducts and clamps the voltage to 5V + Vf. Current thru R2 then becomes (12V - 5.7V)/R. Many uCs have diode clamps to Vcc and to Gnd (to limit below 0V excursions), but the diodes are limited to a few mA of current. If the current is exceeded, they could fail - if they fail open, the following circuit is exposed to Vin. If they fail shorted, Vcc is exposed to Vin and if enough current is available the entire chip could be damaged.


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