How do we compute power from current and voltage samples? Can we quantify its accuracy?

Question

I have a datalogger that periodically samples current values by measuring the voltage across a power resistor connected in series with a battery and sensor (the load). The datalogger also samples the voltage across the sensor. Let's call the current samples i[n] and voltage samples v[n]. Sampling of both signals is controlled programmatically (i.e., I specify in code how often to sample each parameter).

p(t)=i(t)v(t) and if we had measured the current and voltage signals continuously (as analog signals and not sampling, as I'd done), we could have built a circuit that "continuously multiplied" i(t) and v(t). p(t) would have been a continuous value.

Instead, we have the discretized the signal by sampling it and so we could only compute p[n] as i[n]*v[n].

How representative is p[n] of the actual power being drawn, p(t)? Why might someone (say an engineer who's in charge of designing the power subsystem) be interested in sampling p[n] at a higher frequency?

Also, what can we say about p[n] if the samples weren't simultaneous (i.e., i[1] was measured 1.5 seconds from the start and v[1] was measured 1.525 seconds from the start)?

Answer 1

How representative is p[n] of the actual power being drawn, p(t)?

Potentially, not at all. For instance, let's say that the applied voltage is a pulse waveform with 1% duty cycle - that is, the voltage is zero for 99% of the time, and (let's say) 10 volts for 1% of the time. The sensor is a 1 ohm resistor. Finally, let's say that the signals are sampled once per voltage cycle, and always during the narrow 1%. It should be obvious that ignoring the actual waveform will produce an estimate which is 100 times too high.

Why might someone (say an engineer who's in charge of designing the power subsystem) be interested in sampling p[n] at a higher frequency?

The previous section should answer that one pretty well.

What you need to do is become familiar with the concept of signal bandwidth. For a signal with a limited bandwidth, if you sample at least twice as fast as the bandwidth you can accurately recreate the signal. Anything less than this will potentially produce inaccurate results.

Also, what can we say about p[n] if the samples weren't simultaneous (i.e., i[1] was measured 1.5 seconds from the start and v[1] was measured 1.525 seconds from the start)?

That is even worse. Depending on the details of the signal, the resulting calculation can bear no resemblance at all to reality.

EDIT - As an example, let's say that the signal is a square wave which has levels of +10 and -10 volts. The load is a 10 ohm resistor. The signal transitions from +10 to -10 at 1.510 seconds. Then the voltage acquired will be 10 volts, the current will be - 1.0 amps, and the computed power will be -10 watts. Just in case you're really new to electronics, this is simply impossible for a resistive system.

As Edgar Brown has commented, if you know enough about the system, the delay between the two measurements can somtimes be compensated for (if the sample rate meets the Nyquist Criterion - but not (in general) otherwise.

Answer 2

There is a way to calibrate accuracy but you do not have a design spec nor given enough design details that will achieve any reasonable spec. of x % under varied conditions.

Unfortunately you have a lot to learn in power measurements Start reading here. This is only a beginning.

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• p[n] ≠ i[n]*v[n]
• instead you have p[n] ≠ i[n]*v[n+1]
• Sample/hold ADC is prone to errors from averaging, power factor and surges when the power is non-sinusoidal or reactive
• if two consecutive I(t) readings change then is it because of V(t) or the load?
• What accuracy do you want? expect? under what conditions of load and time duration?

Suggestion

• choose dual slope integration type ADC with 20ms for 50Hz
• or dual true multiplier with filter to ADC

FYI

https://www.maximintegrated.com/en/app-notes/index.mvp/id/1041

Line Rejection

One of the most attractive attributes of the DS-ADC is its rejection of unwanted 50/60Hz signals. If the integrate cycle lasts exactly time T , all frequencies of N × 1/T are completely rejected (theoretically). So for T = 100ms, multiples of 10Hz are rejected. The actual limitation of this rejection is due to the finite swing of the integrator (since we don't want it to saturate) and the inevitable "wobble" of the 50/60Hz frequency itself. Over a long period of time, 50/60Hz can be averaged to get extremely accurate time bases. Over a short time however, it jitters by a few Hertz. This will limit the actual line rejection to about 40-60dB.

Added: Explanation with demo

Measuring True RMS power averaged over many cycles is normally done with thermal R sensors or true multipliers with very high bandwidth, anti-aliasing filters high sampling rate to capture all the spectrum.

True 19.25 Arms at source

Precision rectified current sense

4th order LPF rectified current sense.

Vrms * Irms ≠ Prms when the multiplying does not use the exact same sample time even if the interval is the same.

• e.g. 230Vrms * 19.235 rms = 4.427 kW yet TRUE Prms= 4.04kW ~ 4kW or 10% error

• It is easy to convert average to RMS for a Sine , but not when it includes PF and spike currents. The errors are unpredictable but often > 10%

• What is your error spec for crest factor error and this does not even consider PF error !!**

• There is always a significant accuracy compromise with cost and complexity with with waveform factor conversions using average current or peak converted to RMS.

  • These will contribute significant errors due to the power crest factor and width and phase shift.

Averaging with a short time sample may introduce measurement errors depending on the phase angle and deviation of phase angle between samples. This simulate shows max/min peak values with RMS or Avg for power, voltage and curent. Compare each result to see why there are differences. The true result is displayed at source using V(t)*I(t) averaged near 4kW for an example of mixed loads.