I have designed two circuits with VHDL and synthesized them with Xilinx ISE design suite. The first circuit is a controller (autopilot) and the second circuit is the same controller with extra circuitry of self-test. Both the circuits are working fine.
My objective is to find out the resource overhead of the self-test circuit that is combined with the controller, on different xilinx platforms and devices.
The resource consumption of each circuit is shown in below:
- Why is the area overhead of the same self-test circuit is different on different xilinx devices (23.88 % on spartan 3, 95.58% on spartan 6 and 34.02% on kintex 7)?
- If the same controller and self-test variant of the controller is synthesized without any changes on differnet xilinx devices, then why is the overhead not of the same percentage?
- why is the overhead is higher on newer devices?