# Making a synchronized, rising edge reset signal to a decade counter [closed]

I made a decade counter as in the picture above, but i still would like to build a signal/button that would make the counter reset to 0 after the clocks rising edge when the signal is at 1, and to do nothing at value of 0. The simplest way i tried to achieve this was to just take the AND-gate and connect the clock and a simple 0/1-pin to it, which would reset the counter to zero during the rising edge. But this makes the counter run up to 15, which is not what i'm aiming for. How could i build the command properly?

## closed as unclear what you're asking by Elliot Alderson, Warren Hill, Edgar Brown, smashtastic, FinbarrFeb 2 at 23:08

Please clarify your specific problem or add additional details to highlight exactly what you need. As it's currently written, it’s hard to tell exactly what you're asking. See the How to Ask page for help clarifying this question. If this question can be reworded to fit the rules in the help center, please edit the question.

• Welcome to EE.SE. Your schematic is rather tangled and you have taken a screengrab with the background grid on making it difficult to read. Remove all unnecessary cross-overs and right-angle joints - although not at the expense of overall clarity of the schema. You might find that as you do the answer becomes obvious. – Transistor Jan 28 at 19:13
• Also, label all of your signals, pins, and ports. It's confusing when you just talk about "the signal". – Elliot Alderson Jan 28 at 20:22

Your schematic is clearly incorrect. All the clock inputs of your flip-flops should be connected to the same clock. This is required for a synchronous system. And the asynchronous reset must only be used to initialize your flip-flops. Not respecting these rules will lead to serious problems in a real circuit.

What must be done is to compute at every flip-flop, its next state according to the state of the counter.

Here is the state table of a 10 bits counter for D flip flops

3210  next   D3 D2 D1 D0
........................
0000  0001   0  0  0  1
0001  0010   0  0  1  0
0010  0011   0  0  1  1
0011  0100   0  1  0  0
0100  0101   0  1  0  1
0101  0110   0  1  1  0
0110  0111   0  1  1  1
0111  1000   1  0  0  0
1000  1001   1  0  0  1
1001  0000   0  0  0  0


So D0=/Q0
D1=/Q3/Q1Q0+/Q3Q1/Q0
D2=/Q3/Q2Q1Q0+/Q3Q2/Q1+/Q3Q2Q1/Q0
D3=/Q3Q2Q0Q1+Q3/Q2/Q0/Q1

Additionnal simplifications can be done by considering the impossible states 1010 to 1111.

Adapting it to JK flip flops is left as an exercise.