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I am making a PCB with an Array of current DACs, which need ~15V, so I'm using a boost converter followed by an LDO.

I've (tried my best) to layout the dc/dc & LDO per best practices but I'm still unsure about how I should be routing the ground from the analog ICs back to the Power "management" ICs to avoid improper return paths.

Right now, I've got a Ground Plane shared by all the DACs that is separated from the boost converter except through a fill that routes thru the LDO, I tried to highlight my ground plane in the pic.

  • Is this correct? following the thinking that I want to have the ground return from the DACs go to the LDO instead of to the , accounting for my poor layout techniques

  • Does it even matter that much??? Is it preferable to just mash the Power/Analog Grounds together into one big ground plane.

  • Or am I actually screwing my design? I'm kind of worried i shouldn't have such a long path from the Li-ion (-) terminal to the Analog circuits ground like i have now.

:/

Edit: Here is the annotated board.

Ground plane: Purple 7.4V from battery to VIN of Boost Converter: Light Blue +15V Vout from Boost Converter to LDO VIN: Dark Blue +12V Regd output from LDO to Every DAC: Red

enter image description here

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    \$\begingroup\$ Could you please provide (the relevant parts of) the schematics as well? \$\endgroup\$ – Huisman Jan 29 '19 at 9:01
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    \$\begingroup\$ Where on the PCB are these current DACs located? On the opposite side of the DC/DC-converters? \$\endgroup\$ – Huisman Jan 29 '19 at 9:12
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    \$\begingroup\$ Do you create a "local battery" for the DACs, using an R+C filter? Use the R of value 10 ohms. Use 100uF capacitor, grounded to the DAC regions. The time constant is 1 millisecond, or 160 Hertz, and will attenuate switch-reg trash (1MHz range) by 10,000:1 if the cap has low ESR and ESL and has short wide PCB traces and has private vias. \$\endgroup\$ – analogsystemsrf Jan 29 '19 at 11:40
  • \$\begingroup\$ @Huisman I've added a second photo. I can't get my most recent schematic at the moment. Is this clear? purple is the ground plane \$\endgroup\$ – apache Jan 29 '19 at 17:40
  • \$\begingroup\$ @analogsystemsrf I did not add a lowpass like that after the LDO, i only have pairs of decoupling caps for this +12v rail for each DAC and the output caps of the LDO. \$\endgroup\$ – apache Jan 29 '19 at 17:42
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(decoupling) capacitors are local batteries from which the high frequent current is drawn. So, on your PCB draw a line from the positive terminal of the capacitor to the IC it feeds (so, Vdd of IC) through the IC to its negative terminal (Vss) back to the capacitor.

To reduce EMI, the length of the drawn loop should be as short as possible and the area enclosed by the drawn loop should be as small as possible. The current flow that draws the most current and/or has the highest frequency components should have the highest priority.

I drew some current loops on your PCB and indicated a so-called starpoint. As far as i can see, you nicely seperated the boost converter currents (right of the starpoint) from the DAC ICs currents (left of the starpoint), so here, you probably don't have 'bad return paths'.

=> Is the trace "12V from LDO" in the same PCB layer as the ground plane? Then, the return path from the DAC IC's will be very bad. But I assume it is not the case and the trace "12V from LDO" is in the top layer and the purple coloured ground plane in the next layer.

Current loops

For boost converters (actually, I think all converters) the most important current loop is from the input capacitor to the Boost IC and back. That's why Layout Guidlines always start with "The input capacitor should be placed as close as possible to the input pin for good input voltage filtering."

I made the assumption the input capacitor is located at the yellow arrow. To reduce the the current loops of the Boost converter I suggest to swap the input capacitor and the capacitor connected to pin 5 of the IC, and extent the ground polygon under the IC to the right, connecting it to the ground terminal of the input capactor.

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  • \$\begingroup\$ OK Got it. In fact, the 12V from LDO is in the same plane as the Ground fill for the topside of board. I only am using 2 layer board and there are 6 DAC on backside of board as well, basically a mirror image of the dacs on this side, \$\endgroup\$ – apache Feb 1 '19 at 20:19
  • \$\begingroup\$ I know this creates a problem as you stated so i added via stitching. Do you think in addition to via stitching I should break up that line alternating b/w Top/Bottom Layer or should i just give up saving money and better to switch to 4 layers and run the power rail on one of the middle layers. TY! \$\endgroup\$ – apache Feb 1 '19 at 20:32
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    \$\begingroup\$ One reason a ground plane is a plane is because its resistance is very low. Secondly, more important, the plane in one layer and tracks in other layers forms a kind of capacitor: return currents will (try to) flow through the plane directly below power/signal tracks. I think there is no need to make ground planes when they are in the same layer as the power/signal tracks, you can use ground tracks instead. For the boost converter you want to have a ground plane, because of the high frequent currents/voltages. But do the DAC's have high frequent components that require a plane? \$\endgroup\$ – Huisman Feb 4 '19 at 14:28
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    \$\begingroup\$ BTW, an alternative to stitching is using 0E resistors \$\endgroup\$ – Huisman Feb 4 '19 at 14:33

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