What is an NWELL?
Silicon wafers are generally P-type silicon so suitable for making NMOS transistors. PMOS transistors need to be placed in N-type silicon. To provide this, an NWELL area is made and in it the PMOS are placed.
Normally the NWELL is connected to the positive supply, VDD. That is needed to keep the NWELL area isolated (by a PN junction biased in reverse mode: P-type substrate = VSS, NWELL N-type = VDD).
You can share the same NWELL between as many PMOS as you like as long
as these PMOS do not need their NWELL to be connected to a different supply.
For inverters and other logic circuits there generally is only one supply and
all NWELLs are connected to that supply. In the layouts of CMOS logic cells I have seen the NWELL areas are shared between many logic cells in order to make the layout smaller. So sharing one NWELL is very common, you can do that as well.
Only when you have a specific reason not to share the NWELLs would you deviate from this. Usually this is the case only for level shifters and some analog circuits.