4-Input NAND Gate Reduction

Question

I'm designing a circuit using Logisim that I will later physically implement. Unfortunately, the gates provided to me in the physical implementation do not include one of the gates I used in my design, namely a 4-input NAND. I do, however, have access to both 2- and 3-input NANDs. Is there any way I can take the inputs to the 4-input NAND and use only 2- and 3-input NANDS to achieve the same functionality?

Answer 1

Do not read this answer if this is homework :-).

You get "action" only when all presented inputs are 1
1111 = 0. All other xxxx = 1
A 3 input gate will deal with 111 and give 0
But the next gate has to deal with 10
It "knows" how to deal with 11
So, invert the 0 from the 3 input gate and NAND it with the final 1
QED

(A 2 input NAND (or 3 or 4 or ... input) knows how to be an inverter with only a little help from you. )