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I'm using Altium Designer 19 and I have a ton of Net Ties many of which I'd like to place underneath other components. My net tie is just 2 6mil pads connected by a trace without any silkscreen or 3d bodies or courtyard or anything... and with the component type set to "net tie (no BOM)". All is well.

However, putting these net ties ( which just looks like a "chunk of trace") under another component I get a DRC collision error. I could ignore these errors, but that seems like bad practice and there are a lot of them. Is there a way to update the library net tie component to tell it that it doesn't have any actual component body and shouldn't generate any collision errors?

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  • \$\begingroup\$ What advantage is there to having them under components? \$\endgroup\$ – Drew Fowler Feb 6 '19 at 21:59
  • \$\begingroup\$ It's just better for the routing. The net ties are to do 4-wire measurement on a grid of photodiodes. Because the photoiodes are big the traces run under them. Forcing the net ties to be outside of the sensor bodies puts a kink in an otherwise clean grid of tracks under the photodiodes... plus there's lots of room under the photodiodes and less room between them. \$\endgroup\$ – Casey Feb 6 '19 at 22:09
  • \$\begingroup\$ For now I've disabled the Component Clearance design rule in Online Rules To Check. This means I'll only see the component clearance errors on the batch DRC, and then I can ignore any of the list that have a Net Tie reference designator. It's not ideal, but functional. Hopefully there's a better way. \$\endgroup\$ – Casey Feb 6 '19 at 22:33
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You can add another Component Clearance rule under Placement with a custom query such as ComponentType = 'Net Tie', HasFootprint('nettie'), DesignItemID ='nettie' etc.

Set the vertical clearance for that rule to 0 and horizontal clearance to whatever you need.

Set the priority of this rule above the other component rules, so Altium wouldn't complain about it having vertical clearance issues.

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So while the net ties method from my question works, I don't think it's the best solution here. A better way is to make each component itself "4-wire" in the library footprint. The challenge here is that these components only have 2 connections. I split the pads in half and assigned each one to a different net. This is the right solution for the design/ schematic/ layout and it gets rid of all of the net ties. The board house squawks about the footprint not matching exactly, but since the outline of the 2 pads matches the original single pad size, the assembly works fine. It also connects electrically at the device pad, which is "more 4-wire" than doing it at a nearby net tie on the PCB.

For example a 2-wire through hole sensor:

2-wire THD sensor symbol 2-wire THD sensor footprint Becomes 4-wire with split pads: 4-wire THD sensor symbol 4-wire THD sensor footprint

Similarly, for a surface mount chip, the pads just get split in half, becoming: 4-wire SMD sensor symbol 4-wire SMD sensor footprint

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