# Designing Excess 5 to BCD using Binary parallel adder

I've been trying to form a combinational logic circuit of converting excess 5 to BCD. I've been able to make a normal logic circuit but I do not know what a binary parallel adder is.

My attempt - formed the truth tables. Got the min terms and Drew 4 kmaps to simplify it. It gave me the normal circuit. How do I implement binary adders to this

• Are you familiar with 1-bit half-adders and 1-bit full-adders? – jonk Feb 12 at 5:39
• Yes the normal ones ? – Naman Sood Feb 12 at 5:48
• I don't know your circumstances, but a "binary parallel adder" is the same thing as a "parallel binary adder" to me. And that's just the usual combination of N full adders to get an N-bit binary adder. Do you have a reason to disagree? (You wrote that you don't know what this is, but I suspect you might.) – jonk Feb 12 at 5:55
• How do you combine them though. – Naman Sood Feb 12 at 6:22
• Well, if you have an excess-5 notion (which I believe just means adding 5), then all you need to do is to subtract 5 to get the 4-bit BCD code. Subtracting 5 is the same as adding the twos complement of 5. – jonk Feb 12 at 6:30