Just because you can find a different, and what seems to you easier, way to detect a toy sequence, doesn't mean that state machines are dead, or that you shouldn't do the exercise you've been set. Celebrate your creativity, it's good to think of alternatives, but work on the state machine solution as well.
It's frequently not clear to students that any given exercise is merely scratching the surface of a method. In order to be able to use it well, we often have to do exercises which seem trivial, or that they would be 'far simpler' if done in some other, usually later, way.
State machine can do much more than just detect sequences, and often faster and at lower power than FPGAs.
Due disclosure. As a physics undergrad, our year-long lab exercise was to build a quite comprehensive sine/square signal generator. It was suggested to us that the we use emitter coupled logic to implement the logic in the squarer. I went 'nah, ECL is old hat, I am sure that at 20MHz I can squeeze the speed out of simpler common emitter stages by reducing voltage swings and impedances. And I could.' Years later, I found myself learning ECL anyway to design a 3GHz ASIC, when it was the only viable route.