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I have a microcontroller powered at 1.8V and I break out V_target, SWD, SWCLK, nRST, and GND from it.

Question: If I provide V_target from the microcontroller to the J-Link Plus, does that mean the I/O voltage levels on the serial wire debug pins are reduced to 1.8V?

I'm looking at this (arguably overpriced for what it is) V_target adapter, and trying to understand the real benefit I get from it: https://www.segger.com/products/debug-probes/j-link/accessories/adapters/supply-adapter/

It appears that it would just allow me to not require an additional wire for V_target coming out of my device.

J-Link Plus product page: https://www.segger.com/products/debug-probes/j-link/models/j-link-plus/

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Yes.

J-Link has buffers (or level converters) that you can provide with any voltage between 1.8 and 5V. This voltage can come from anywhere - from the target, from an LDO on the J-Link side, from another PSU. It hardly matters as long as the logic levels of the target MCU match the logic levels of J-Link buffers.

You could even inject power via Vtref to the target board (depending on the exact design).

The linked adapter does exactly what is advertized - it allows to generate the voltages on the J-Link side and get rid of one wire connecting to the target board.

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