In order to generate a short pulse off a permanent constant current signal, I made this circuit. It works well except that it created a very high frequency ripple which wreaked havoc all over the prototype board, not just the output, and brought the voltage of the entire board from 5V to 3V, sometimes less.

The frequency was so high that my 200Mhz oscilloscope couldn't see the wave but I could see that the line was very thick.

I solved the problem by adding a 15pF cap (C2) between the output and ground. Now the signal is perfect. Before, when my circuit had problems, it was the same, just without this cap. There was already a 330K resistor to ground and I thought that would be enough to avoid this type of interference.

I think that the voltage drop was due to other ICs being pulsed extremely fast albeit at undefined levels. Before finding out where the problem came from, the symptoms were not clear: The board worked as expected. Then the next day I changed something apparently not related and it started working unpredictably.

Is this phenomenon common? Should I be concerned about other flaws in my circuits which could be the cause of this? Or was it what is called "capacitor self-resonance"?


simulate this circuit – Schematic created using CircuitLab

The triangle on the left is a Schmidtt trigger. I can't confirm if the same effect would appear if the signal source came from another ic or a power supply directly.

The board is a composition of three 595 shift registers, schmidtt triggers, a 557 clock, 2 or 3 mosfets and a bunch of schottky diodes. It's powered by a linear regulator, itself powered by a 15V power supply. Changing the power supply to a completely different one didn't change anything. All the ICs have decoupling caps, which I think have also no effect as far as this board is concerned. Adding them didn't produce anything visible.

  • \$\begingroup\$ Which Schmitt trigger? Perhaps that particular one has an output capacitance max which is being violated by C1. I'd say that yes, more than a few devices do not handle driving capacitive loads well. Some regulators and op-amps fall into this category also. \$\endgroup\$
    – rdtsc
    Feb 12, 2019 at 22:43
  • \$\begingroup\$ That's a good point. Depending on how the output of the schmitt trigger is buffered and the impedance of the trigger's power supply, it might not switch cleanly. That doesn't suggest what might be happening with C2, so I'm not quite sure. You might also want to look into the impedance of the pulse output to see if there's some sort of ringing there. \$\endgroup\$ Feb 12, 2019 at 22:51
  • \$\begingroup\$ "a short pulse off a permanent constant current signal" - you need to be more accurate in wordings. You can't create any pulses out of "constant signal". You can create pulses out of edges, transitions. More, the C-R circuit is called "differentiating" circuit, and the use of differentiating circuits in digital designs was condemned 30-40 years ago, don't use it, it creates noisy signals and negative pulses as well. \$\endgroup\$ Feb 12, 2019 at 22:57
  • \$\begingroup\$ "The triangle on the left is a Schmidtt trigger."- and what is connected to the right? \$\endgroup\$ Feb 12, 2019 at 23:01
  • \$\begingroup\$ @rdtsc The schmitt trigger is NC7W7Z17 eu.mouser.com/datasheet/2/308/NC7WZ17-1301535.pdf \$\endgroup\$
    – Fredled
    Feb 13, 2019 at 0:06

2 Answers 2


There isn't much difference between the two (they are right on top of each other), however there is probably much more going on with the design. I'm willing to bet you have one of the following problems:

enter image description here

1) Your ground is not continuous and has large amounts of parasitic inductance

2) Vcc has a large amount of parasitic inductance, or not enough local storage for the IC's with power filter caps.

The problem is the things you can't see. On the schematic we commonly draw Vcc and ground as one net. When the circuit is built we connect ground and Vcc with conductors, these conductors have resistance and inductance (and between them capacitance). Usually when you have these wierd problems, it's because you have too much inductance, and you've built and RLC filter with the resistor being the load the C being a power filter cap and the L being a wire to the IC.

Make sure you use large conductors and avoid daisy chaining Vcc and ground. Each IC's current should have a direct pathway back to the power supply, otherwise you'll have common mode problem.

Another thing that could be going on is the voltage regulator could be improperly compensated, check the datasheet and make sure you have a proper filter capacitor on the regulator.

  • \$\begingroup\$ Thanks for this reply. Indeed both circuits generates the same graph. The pulse is fine in both cases. (I forgot about the negative pulse when the cap discharge. Yet I didn't see it on the oscilloscope => ???). The problem is what happens after (and possibly before too) the pulse has been shot and faded away. The "resonance" or "oscillation" observed is the result of the 0.1uF cap (C1) and other things after or before it, but doesn't affect the shape of the pulse. Just causes massive voltage drop and instability. \$\endgroup\$
    – Fredled
    Feb 13, 2019 at 0:34
  • \$\begingroup\$ Vcc's and GND's are indeed daisy chained and there are quite a lot of wires on the prototype board (not breadboard. Everything is soldered). It's possible that inductance has an effect. I'll try to correct that. About the voltage regulator: I think it has the proper cap both before and after. I followed recommendations. But I put a larger cap at the regulator input. Normally the circuit shouldn't take so much current as to destabilize the reguilator. But I lose 0.3 to 0.5V just at power up, clock idle and no special problem noticed. \$\endgroup\$
    – Fredled
    Feb 13, 2019 at 0:45
  • 1
    \$\begingroup\$ If the circuit is drawing too much power, if you have access to a thermal camera this can help find the parts that are sinking the most power and probably in a fault. \$\endgroup\$
    – Voltage Spike
    Feb 13, 2019 at 15:56
  • \$\begingroup\$ I also think that voltage drop should be much less. I don't have access to a thermal camera but I can debug by disconnecting the red power wires one by one. \$\endgroup\$
    – Fredled
    Feb 13, 2019 at 17:01

Its not unheard of for high-speed discrete CMOS logic to self-oscillate if the source impedance is very high. Parasitic capacitance between the output and input terminal can form a relaxation oscillator.

While this may not be the source of your woes, it is something to be wary of, if the source impedance is very high (100's k Ohms and above). Your bypass cap reduces the effective source impedance at high-frequencies.

  • \$\begingroup\$ It self oscillate when current is constant or zero volt? (zero frequency) \$\endgroup\$
    – Fredled
    Feb 13, 2019 at 0:48
  • \$\begingroup\$ CMOS will oscillate, if the GROUND or VDD are sloppy, high-inductance, daisy-chained, etc. \$\endgroup\$ Feb 13, 2019 at 2:39
  • 1
    \$\begingroup\$ Even with a solid ground and ample decoupling, because the input/output pins of a gate are often adjacent this can be enough coupling to oscillate when the input is driven by a high impedance source. \$\endgroup\$
    – sstobbe
    Feb 13, 2019 at 3:24
  • \$\begingroup\$ Thanks for your helful comment. In my case there is no high impedance output and the line between one output and one input is interrupted by a schottky diode. A schottky can also generate or facilitate an oscillation but I don't think it's the case here.. \$\endgroup\$
    – Fredled
    Feb 13, 2019 at 16:58

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