1
\$\begingroup\$

I've been reading the datasheet for the Z80 PIO chip a lot in the last few weeks, and I still don't fully understand what it's supposed to do. Take this diagram, from the Z80 CPU datasheet:

PIO diagram

This is an example of how to use the Z80 CPU with the Z80 PIO and a ROM chip.

So, my understanding of the Z80 PIO is this:

  • The CPU can send data to it so that it can send that data to perhipherals such as a keyboard.
  • It can send data to the CPU from peripherals.
  • It can also be used to control RAM chips.

Is any of this wrong?

Mainly, I'm confused as to exactly what the ports are. Do I attach one peripheral to each port? If this is the case, how would I control, say, three peripherals?

I'm also confused as to why A0 and A1 control B/A and C/D pins. Does this mean I would address a peripheral attached to port A with the address bus looking like: XXXXXXXXXXXXXXX0? (Since then A0 is low?)

If my question's unclear, I'm looking for a clear explanation of what the PIO is for, and what exactly the ports mean, and what they're for.

\$\endgroup\$
3
\$\begingroup\$

It is just a digital parallel I/O port. You can configure the individual port pins as digital inputs or outputs and then use them for whatever you want. If you were to configure a pin as output and connect a LED to it (with proper buffering) the Z80 would be able to turn the LED on and off. If you were to configure a pin as input and connect a push button and appropriate pull-up resistor to it the Z80 would be able to read the state of the push button.

The A/B input selects between either PortA or PortB and the C/D input selects between either the control register or the data register. The control registers are used to configure the ports and the data registers are used to read/write the actual data. So there are 4 possible combinations:

  • Control register for PORTA
  • Data register for PORTA
  • Control Register for PORTB
  • Data register for PORTB

By connecting these to A0 and A1 one can access the desired register using the address bus by accessing a appropriate memory address. If the least significant bit of the memory address (A0) is 0 then PORTB is selected, if it is 1 then PORTA is selected. If bit A1 of the memory address is 0 then the data register is selected, otherwise the control register is selected. The other bits of the memory address play no role (although one should take care not to create conflicts with other devices on the memory bus).

\$\endgroup\$
  • \$\begingroup\$ Not a memory address, an IO address, the Z80 has separate IO and memory access commands. In practise CE would have been driven by an address decoder ('LS138 or the like) to allow more then one IO peripheral. It has nothing to do with controlling the ram chip (And in fact the supplied circuit has NO RAM). \$\endgroup\$ – Dan Mills Feb 13 at 12:22
  • \$\begingroup\$ How come, then, the WR pin on the Z80 CPU isn't relevant to the PIO? Surely when the CPU has data to send, the PIO needs to know this. \$\endgroup\$ – Jacob Garby Feb 13 at 13:41

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.