I am using the STLINK from a Nucleo board in order to flash and debug a STM32F7 MCU on a custom board.

Everything works fine except when STLINK is connected to my custom board AND unpowered. Indeed, in this case the MCU on my custom board doesn't seem to start.

After some investigation, I realise that it is the NRST pin (CMOS technology) from the STLINK which is shorted to GND when unpowered, shorting to GND NRST on my custom board.

A simple workaround is to disconnect the NRST pin from STLINK when it is unpowered but I would like to know if there is a way prevent NRST from being shorted to GND without having to disconnect this cable.

I tried a 10K pull-up resistor to VDD of my custom board but of course it doesn't change anything as it seems to be a real short to GND and not through a pull-down resistor.

Does anybody have knowledge of the exact architecture of the CMOS driver of NRST pin ? The piece of information provided by datasheet (p.67) is not really helpful as there are no exact characteristics of the CMOS themselves.

  • 1
    \$\begingroup\$ I wouldn't leave an unpowered debugger connected to my hardware. I've seen different effects, all of them were bad. Even a powered debugger can have negative influence on the hardware. Just unplug it or power it up. \$\endgroup\$
    – Arsenal
    Feb 15, 2019 at 10:52
  • \$\begingroup\$ Consider using a MOSFET level shifter (a well known design, but Sparkfun is often associated with its current popularity). This is ideal for things which are pulled down but otherwise maintained by a pull-up resistor, such as your NRST as well as the I2C it was designed for. In this case it is the potentially unpowered programmer that needs to be treated as the low voltage side. \$\endgroup\$ Feb 16, 2019 at 16:52
  • \$\begingroup\$ You could also just making connecting the reset optional; it is generally not needed unless your code activates sleep modes or re-purposes the SWD pins, however STM32s are prone to get corrupted during flashing on occasion in ways which break SWD, so it is useful to be able to connect the reset to recover them (or alternately take BOOT0 high to start from system flash, letting you get in with the SWD). \$\endgroup\$ Feb 16, 2019 at 16:56
  • \$\begingroup\$ Ok, I will try to flash the MCU without NRST to see if it works. Thank you for the tip ! \$\endgroup\$
    – tponc
    Feb 18, 2019 at 7:57
  • \$\begingroup\$ I have come across the same behaviour when using a standalone STM32F411 on a custom board and programming it with the official ST-LINK V2. The MCU by itself doesn't work if the debugger is unpowered and the NRST is connected in. Also, the ST-LINK V2 cannot even connect to the MCU without the NRST plugged in. It was a bit of an annoyance, but now I have my board powered by pin 19 of the ST-LINK V2 which provides 3.3V instead of a separate VDD for it. Less cables and at least I don't run into this strange issue. Thanks for your post though. \$\endgroup\$ Apr 19, 2019 at 9:06

1 Answer 1


The GPIO information you're looking for is in the reference manual. Here's the structure of a regular, non-5V-tolerant GPIO pin on the STM32F103 series (used in the STLink/V2-1 on Nucleo boards):

Figure 13 from Section 9.1 of RM0008

Note that the top protection diode shunts voltages above the microcontroller's VDD into the supply rail to protect the IO pin. When the microcontroller is unpowered, that means that the IO pin might inadvertently sink current through the protection diode to power the microcontroller.

This parasitic power draw may be enough to overcome the internal/external pullup resistors on NRST and hold your main microcontroller in reset.

Unfortunately, without changing the design of the debug hardware, I don't see a good way to prevent NRST from being pulled to ground without disconnecting it. You might be able to find a series resistor value that allows normal reset operation (pulled to ground through the NMOS of the IO pin) while limiting the voltage drop when the debugger is powered down (pulled to ground through the protection diode).

Equivalent circuit for normal operation:


simulate this circuit – Schematic created using CircuitLab

Equivalent circuit for unpowered operation:


simulate this circuit

†: Not all GPIO pins are designed this way - if you review Figure 14 on the same page, you'll see that the top protection diode for 5V tolerant pins feeds into a separate 5V rail that does not necessarily backpower the microcontroller.

  • \$\begingroup\$ An actual ST-LINK/V2 has additional protection and level tranaslation circuitry between the MCU and its target, but it is unclear what the asker is actually using. \$\endgroup\$ Feb 16, 2019 at 17:06
  • \$\begingroup\$ Based on the description "STLINK from a Nucleo board", I assume they are using an ST-Link/V2-1 from a dev board, which is not designed with additional protection and level translation since its use as a standalone debug probe is a bonus feature. \$\endgroup\$
    – Devan
    Feb 16, 2019 at 17:30
  • \$\begingroup\$ You're right, I overlooked that in the question. \$\endgroup\$ Feb 16, 2019 at 17:48
  • \$\begingroup\$ Yes, I indeed use the ST-Link/V2-1 from the dev board. I will try the series resistor thing and let you know. Otherwise I will just disconnect this pin. Thank you ! \$\endgroup\$
    – tponc
    Feb 18, 2019 at 7:55

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