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I have to connect a 5V analog signal to a 3.3V MCU analog GPIO input as shown in the attached image. I wonder if its possible to combine the 2 blocks of voltage divider and RC-LPF into a single block? Is it possible to reduce the 3 resistors to 1 resistor? If possible then how to calculate the resistor value?

Edit:

The values shown in image are not real. The cutoff frequency I intend for the LPF is anything around 2k Hz

enter image description here

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The 330 Ohm resistor will mess up your voltage divider, I would just remove that one, for the other two resistors I'm afraid you can't remove them.

schematic

simulate this circuit – Schematic created using CircuitLab

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    \$\begingroup\$ Your filter has a cutoff frequency of 120 Hz, the op looks to have been aiming for 4.8 kHz \$\endgroup\$ – Colin Feb 18 at 21:16
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    \$\begingroup\$ In that case I think the answer will most likely be that it is not possible with this setup. \$\endgroup\$ – Tim Jager Feb 18 at 21:25
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    \$\begingroup\$ 25 nF instead of 1 uF gets pretty close \$\endgroup\$ – Colin Feb 18 at 21:28
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    \$\begingroup\$ That 1µF was something I overlooked when making the circuit, but the 25nF looks better then what I had in mind. \$\endgroup\$ – Tim Jager Feb 18 at 21:33
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Your conceptual circuit does not really work, unless you really intended to place the low-pass filter corner at ~950Hz instead of 4.8kHz. As it is, your filter pole is being mostly determined by the voltage divider, not your 330Ω resistor.

Simply use the voltage divider and the value of its Thevenin resistance to calculate your filter capacitor. Your 2kΩ:4kΩ divider has a Thevenin equivalent resistance of ~1.3kΩ. So a capacitor of ~25nF would produce your expected pole at 4.7kHz.

You only save one resistor though.

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  • \$\begingroup\$ Ah! Thevnin. I always forget about that. Here I was trying to do circuit analysis to calculate the -3dB cutoff point. it was...tricky. \$\endgroup\$ – DKNguyen Feb 18 at 21:18
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Simply place the filter capacitor in parallel with the lower leg of the resistive divider. High frequencies will view the capacitor as a short-circuit and bypass the lower resistor to ground. Low frequencies will view the capacitor as an open circuit and proceed through the resistive divider as normal. In other words, the resistive divider becomes a resistive divider where the lower "resistor" (which is really a resistor and capacitor in parallel) will see an impedance which varies with frequency, thus the ratio will vary with frequency in that the higher the frequency, the more the voltage will be divided by all the way down to zero, ideally.

You will have to adjust all the values from what you initially have though to maintain a particular divider ratio and cutoff.

You may want to buffer the the entire circuit before it enters the ADC with an op-amp voltage follower though.

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    \$\begingroup\$ Reading your question again, I am not sure what you mean by reducing 3 resistors to 1 resistor. Surely you mean reducing three resistors to two resistors? \$\endgroup\$ – DKNguyen Feb 18 at 20:37
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    \$\begingroup\$ Was trying to calculate the cutoff formula for you, but it got tricky and Edgar Brown below used Thevnin which I forgot about and is infinitely easier. \$\endgroup\$ – DKNguyen Feb 18 at 21:20

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