Our team has developed a several controller boards for our current Projects for over three years. With little modifications we have used this board in several projects so far. Its structure is as follows:
As you see almost all peripherals are connected to FPGA and The data bus between FPGA and CPU is a parallel bus (16 data line,12 addr line)based on FSMC-FPGA is like an SRAM for MCU-
Now we have decided to upgrade it to a modular system, here is system sketch:
At the moment we are investigating about buses and Backplanes and trying to choose one.
EDIT here are some of our requirement:
- we need one/two CPU slots(s)and modular peripherals on a multipoint Bus.
- all nodes can send/recv data to/from the CPU slot(s)
- CPU shall assess other slots like memory blocks (FPGAs on the slots act as memory for the CPU slot).
- the communication speed of between CPU and peripherals Must be at least 25Mbit/s.
- it would be better to have hot-swap capability but it is not essential now
- we do not need communications between peripheral slots
- what are possible or recommended choices for "Bus Drivers and Receivers" for our system? as far as i know here are some:
- Backplane Transceiver Logic (BTL) e.g. SN74FB1651
- General-Purpose Interface Logic e.g. 74ALVT162245DL
- Gunning Transceiver Logic Plus (GTLP) e.g. SN74GTLPH32912
- VME64 e.g. SN74VMEH22501A
what are possible or recommended choices for "Data Link (node-to-node validity and integrity of the transmission)" for system? as far as i know here are some:
Is there any application note,sample or reference design for a parallel communication (add/data bus) over backplane on a uC?
- Is there a Bus controller to Transceive our current parallel data over backplane on each slots so that we don't care about the bus or packplane :)