Our team has developed a several controller boards for our current Projects for over three years. With little modifications we have used this board in several projects so far. Its structure is as follows:

system structure

As you see almost all peripherals are connected to FPGA and The data bus between FPGA and CPU is a parallel bus (16 data line,12 addr line)based on FSMC-FPGA is like an SRAM for MCU-

Now we have decided to upgrade it to a modular system, here is system sketch:

sketch of designed modular system

At the moment we are investigating about buses and Backplanes and trying to choose one.

EDIT here are some of our requirement:

  • we need one/two CPU slots(s)and modular peripherals on a multipoint Bus.
  • all nodes can send/recv data to/from the CPU slot(s)
  • CPU shall assess other slots like memory blocks (FPGAs on the slots act as memory for the CPU slot).
  • the communication speed of between CPU and peripherals Must be at least 25Mbit/s.
  • it would be better to have hot-swap capability but it is not essential now
  • we do not need communications between peripheral slots


  • what are possible or recommended choices for "Bus Drivers and Receivers" for our system? as far as i know here are some:
    • Backplane Transceiver Logic (BTL) e.g. SN74FB1651
    • General-Purpose Interface Logic e.g. 74ALVT162245DL
    • Gunning Transceiver Logic Plus (GTLP) e.g. SN74GTLPH32912
    • VME64 e.g. SN74VMEH22501A
  • what are possible or recommended choices for "Data Link (node-to-node validity and integrity of the transmission)" for system? as far as i know here are some:

    • PCI/CompactPCI
  • Is there any application note,sample or reference design for a parallel communication (add/data bus) over backplane on a uC?

  • Is there a Bus controller to Transceive our current parallel data over backplane on each slots so that we don't care about the bus or packplane :)
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    \$\begingroup\$ This is far, far too broad a question to address here. There is way too much information missing. First, why do you "need" to invent a proprietary bus? Are you that certain that you will never want to use COTS boards in your system? Second, what are the characteristics of the data flowing over this bus, such as which boards are communicating with each other, and what are the data bandwidth and latency requirements? Do you need hot-swap capability? Are there any physical constraints on the form factor of the cards? And so on... \$\endgroup\$ – Dave Tweed Feb 20 '19 at 13:43
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    \$\begingroup\$ Take a look at this one ti.com/lit/an/snoa194/snoa194.pdf We used it in a high speed system that could hold 27 cards with 64-bit wide address/data in a very long chassis as the cards were all dual-cards on a thermal plate. \$\endgroup\$ – CrossRoads Feb 20 '19 at 15:42
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    \$\begingroup\$ I think Mouser carries the DS1776, but am having trouble connecting the Mouser or Digikey at the moment mouser.com/Search/Refine?Keyword=DS1776 \$\endgroup\$ – CrossRoads Feb 20 '19 at 15:47
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    \$\begingroup\$ Hmm, maybe not. Another fast transceiver would be the 74ABT16245B, with 2nS propogation delay times, • 3-state buffers • Output capability: +64 mA and -32 mA Or SN74ALB16245DGGR for 3.3V power ti.com/lit/ds/symlink/sn74alb16245.pdf \$\endgroup\$ – CrossRoads Feb 20 '19 at 15:54
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    \$\begingroup\$ That's a good start with additional data, but still incomplete. I finally had to look up what FSMC stood for, and added a link to your question. Let me know if I got it wrong. One problem: You want a bus with two masters, but FSMC doesn't appear to have any built-in support for that. PCI (not PCIe!) might be a good fit, but I'm not familiar with the COTS bridge chips for it. \$\endgroup\$ – Dave Tweed Feb 21 '19 at 2:23

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