# BJT amplifier design with input resistance, output resistance, and open-loop gain requirements

so currently i'm designing a BJT Amplifier with these requirements:

1. Open-loop gain = 35 dB
2. Input resistance = 600 Ohm
3. Output resistance = 200 Ohm

Another thing is the only BJTs I can use have hFE of 194 and 250.

Concerning the usual value of input resistance and output resistance of a common-emitter config, I thought its possible to realize it using only 1 BJT with common-emitter config. But it seems that whenever I successfully satisfied 2 requirements, I couldn't satisfy the third one (its like some kind of a trilemma).

I would really appreciate if someone can enlighten me on how to design a BJT amplifier starting with the requirements I mentioned before (Avo, Ri, Ro). Thank you in advance :)

• This sounds like a homework question. Please show us all of the work you have done so far...show us your circuit that satisfies the first two requirements, for example. – Elliot Alderson Feb 21 at 15:37
• What requirements for gain accuracy? for power consumption? for # transistors used? how accurate must Rin be? how accurate must Rout be? what VDD is allowed? – analogsystemsrf Feb 21 at 18:34
• It does sound like homework. If so, are you allowed to use ANY set of voltage supplies here? Is that completely open to your choosing? What about bandwidth and center frequency? Or are those the ONLY specifications you have to hit, any way you want? – jonk Feb 21 at 19:20

simulate this circuit – Schematic created using CircuitLab

A very strange spec' for a CE amp!

Usually you'd want the input resistance to be as high as possible so you don't lose too much signal amplitude between the source resistance and the amp input resistance. 600R is quite low.

200R is very low for a CE amp output resistance although a low output resistance is usually desirable again to avoid losing too much signal amplitude between the output of the amp and the load resistance which is often the input resistance of a following stage. You'd have to have a very low load resistance to justify having such a low amp output resistance.

Such a low output resistance,R3 results in a very high collector current (23mA). Ic is usually less than 5mA in this type of design. Such a high collector current results in a very low value of re (approx. 1R). The high gain also results in a low value for R1 and the low value R1 and re together necessitate a very high value for C1 in order to pass down to 20Hz.

To adjust the gain vary the value of R1. To adjust the collector DC bias point vary the value of R2 but with the resistor values shown the collector should be correctly biased to about 4.5V.

Gain is independent of the transistor hFE. The bias point (Q point) and input resistance will vary to a degree with hFE.