This question is about a 32 bit Intel Chip using x86 assembly. My question specifically is what happens when you do the mov reg, mem instruction where the memory operand is a word (16 bits) from DRAM. Every time DRAM gets read for a memory access, a lot more than a word is being read right? So is the memory controller grabbing a subset of those bits from DRAM- depending on the operand size- and only sending 16 bits to CPU? Or does the CPU receive more than 16 bits and has to isolate the 16 bits itself? An entire double word (32 bits) isn't moved to the register, right? I'm assuming you're not getting 2 extra bytes in a register that you didn't want. So what's in charge of giving the correct memory operand size?
It's worse than that. the 16 bits from memory may be aligned across two memory rows meaning that two reads are performed
exactly what happens depends on which 32 bit processor you are considering. 80386 doesn't have cache and, so would just discard the unwanted bits, more modern CPUs will cache the fetched data, so the
mov instruction may cause 0,1,or 2 memory read cycles depending on cache hits and alignment.