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I am trying to switch stw12nk90z N channel MOSFET as high side switch at 20khz frequency with Vds=30V, Rload=18ohm, and Vgs=24V (Rgate=100ohm, Rpull_down=1kohm). I am using TLP250 for level shifting and obviously, An isolated power supply for the gate signal.

enter image description here

Unfortunately, the voltage between the drain and source pin (represented by the graph in blue in the picture) was not square like the input (represented by the graph in red in the picture), it had the straight rise-up and down but had a curve like a sin wave at the top and not stable. I have also added the snubber and anti-parallel diode with the gate resistor but it didn't resolve the issue. Moreover, the MOSFET is also getting heated rapidly even at the current of 500mA.

This is testing for the prototype circuit. The real application will have Vds=600V with Id=5A.

Kindly let me know what's wrong with the circuit or strategy. I am using the following circuit (note that TLP250 is 8 pin IC, I have used this schematic just for the sake of reference), just skip the transistors. enter image description here

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    \$\begingroup\$ 10R = R2, we usually refer to components by their reference designation (not their resistance). \$\endgroup\$ – Tyler Feb 25 at 19:23
  • \$\begingroup\$ Why did you skip the transistors? You need high peak currents to turn the FET on and off, and the optocoupler with a 1K pull down is not an ideal gate driver. You would have lower losses with a proper gate drive scheme. How are you measuring the drain-source voltage? Do you have a differential probe? \$\endgroup\$ – John D Feb 25 at 19:23
  • \$\begingroup\$ TLP250 can handle high peak currents and the load is purely resistive in nature. \$\endgroup\$ – Jugal Mistry Feb 25 at 19:26
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    \$\begingroup\$ Ah, I see, you're correct it is an optically isolated gate driver, not a phototransistor opto as shown in your schematic. It is usually good to include a link to the datasheets of your parts in the question. \$\endgroup\$ – John D Feb 25 at 19:29
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    \$\begingroup\$ What are the conditions for your scope waveforms? You say 24V VDS in the beginning of the question, and 600V later, but the waveform shows a peak of what looks like 200V. Also, when the FET gate signal is on, there appears to be 25V Vds? How are you measuring this? Do you have a good differential probe, or are you subtracting two channels? \$\endgroup\$ – John D Feb 25 at 19:40
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I think you have two separate issues. First is the high frequency oscillations at the switching edges. These devices have very high dv/dt capability, so a small amount of stray inductance in either the gate or drain path can cause an oscillation. The part will dissipate power during this oscillation. You will be able to limit this with good layout practices, but you probably will need a heat sink in your high power design. Because your high frequency oscillation's amplitude is more than two times your power supply, you will eventually break down the FET when you try to increase voltage. This is the part of the problem that can be solved with a snubber. A snubber reduces the voltage spikes but does not necessarily decrease the amount of time that the FET is in the active range.

The second issue is probably your supply voltage. High current switching power supplies generally have large output capacitors. The power supply's drive circuitry can charge these capacitors up to the desired voltage, but when the load is suddenly removed, there is no mechanism in the switcher to drive the voltage in a negative direction and discharge the caps; it must bleed down through the load. This generally causes a voltage increase from the time constant in the regulator loop before the bleed-down commences. You could try running the circuit with a separate 18-ohm load in parallel to give the power supply a path to discharge through.

Switching power supplies all regulate by charging and discharging inductors. Each time you charge an inductor with the power source, a small "packet" of energy is stored in the inductor and then released to the load. Regulation is caused by varying the size and or frequency of these packets; if the output is too low, the packet size or frequency is increased; too high and they are decreased. When you are running into a heavy load, the packets are correctly sized for your load, and when the load is suddenly removed, a few of these large packets are still passed to the output causing the voltage to rise. The switcher then stops supplying additional energy packets, but the voltage will persist until the output capacitors bleed down.

Check the voltage on R1; you can use it as a current sensor. It looks like you are not turning off hard. When the FET is "off", you have voltage but virtually no current (low power) and when it is "on you have current at almost no voltage, but when you have both current and voltage on the FET you will dissipate power. The part has a thermal resistance of 50C/W, so you can heat up with only small power in the part. You might get by with placing a large capacitance across your power supply (BAT1) near to the driver.

Good luck!

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  • \$\begingroup\$ I am already using a snubber for dv/dt but still getting those massive spikes. Second, talking about high current switching power supplies the load is consuming a current of 500mA which I think isn't a massive amount. The circuit works perfectly for low side switching scheme with the same parameters respectively. \$\endgroup\$ – Jugal Mistry Feb 26 at 7:13

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