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I have a digital 3.3V PWM signal that I want to send to a speaker, i.e.

  • amplify to higher voltage (e.g. 12V, but not sure)
  • and remove DC offset with a capacitor.

For the capacitor to work as intended, I think the amplification needs to be capable of sinking to ground.

After all I read, a push-pull amplifier should be doing the trick, but I don’t see how this can work without a negative supply rail. What are my alternatives?

schematic

simulate this circuit – Schematic created using CircuitLab

  • Since 12V > 3.3V, Q1 will essentially always be in saturation, thus in the configuration above, I’ll have a short circuit if Q2 is also in saturation.
  • If I exchange Q1 & Q2, then I won't have the voltage amplification any more, because as soon as C1 reaches 2.7V, the NPN transistor will be cut off. (And if it were not, soon after the PNP transistor would activate again.)
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    \$\begingroup\$ Indeed, your proposed circuit will not work. It will blow up one or both transistors as you basically connected two (Base-Emitter) diodes in series directly across the 12 V supply. What you need to do is stop trying to "design" a circuit without first looking at / studying existing circuits. What you want might be a "Class D amplifier" so use Google to find "class d circuit", look at some of the circuits. Try to understand how they work. Oh and be prepared that when this works, a 12 V PWM signal might damage the speaker. \$\endgroup\$ Feb 26, 2019 at 12:23
  • \$\begingroup\$ Without being so dramatic, add a 1k resistor at the base of each transistor. The current will be limited by C1 anyway, you won't blow anything up. You might need to make sure both transistor do not conduct at the same time, best would be to have 2 signal generator (simple to do with a MCU) with a dead time between the edges. \$\endgroup\$
    – Damien
    Feb 26, 2019 at 12:27
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    \$\begingroup\$ @Damien The current will be limited by C1 anyway Explain to me how that works because I fail to understand your point. The base resistors will indeed "save" the transistors but still this circuit cannot work with a 3.3 V PWM signal as input. \$\endgroup\$ Feb 26, 2019 at 12:30
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    \$\begingroup\$ @Damien You're just repeating yourself, I want to hear an argument which explains why your statement is true. How does the capacitor limit the current. If the capacitor is 10 nF then indeed, the current would be too small to damage the speaker but also little wanted signal will come out. To get the wanted power output the capacitor needs a reasonably high value so it will have a low impedance at 30 kHz so the speaker can be damaged as the capacitor will behave as a short. \$\endgroup\$ Feb 26, 2019 at 12:38
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    \$\begingroup\$ ..the main difference.. Not really, the Maxim app-note discusses a completely different circuit. It is a commonly used circuit in DCDC converters and class D output stages. That "gate amplifier" is actually somewhat complex as it needs to drive between 0 and Vdd + some voltage. This is needed to get the upper NMOS fully conducting. You cannot just look at one example and think that you get it now. Being able to fully understand these designs takes a lot of practice, like years. \$\endgroup\$ Feb 26, 2019 at 12:46

3 Answers 3

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Your circuit is going to damage something in short order. If you consider the transistors as back-to-back diodes (which is what bipolar junction transistors are, in a naive sense), what you have is:

schematic

simulate this circuit – Schematic created using CircuitLab

Follow the current path to see that you've created a near-short-circuit from +12V to ground via the base-emitter junctions of each transistor. I believe what you meant to draw was the third circuit "Z" here:

schematic

simulate this circuit

I've simply swapped Q1 and Q2. In my circuit it's the emitters which are tied together, and the collectors are connected to the power supply rails. In your circuit, you've done the exact opposite. The difference is subtle, but hugely important. It completely alters the behaviour of the transistors.

X and Y are emitter followers. The transistor in X is able to "pull up" the output voltage very strongly. In other words, it is able to source lots of current. However, you must rely on R1 to "pull down", or sink current, which means this circuit is good at sourcing current, but can't sink it very well without using a ridiculously low value resistor R1.

In circuit Y, the situation is reversed. This configuration is a great current sink (via Q2), and can pull the output voltage down very hard when needed, but R2 must be very small to pull up (source current) with any heft.

This is the important thing to grok; both X and Y are emitter followers, where the emitter is free to swing up and down in potential. As the bases rise and fall in potential, the transistor will "switch on" exactly enough to bring the emitter potential with it.

By combining X and Y into a single circuit Z, we are able to push and pull (sink and source current) strongly, and have an output potential that "follows" the input, albeit with an offset of 0.7V.

In your circuit you've tied the emitters to the supply rails, and since the bases are tied to their emitters with a PN junction (diode), you've also clamped the bases to within 0.7V of the supply rails. Your circuit operates in a completely different manner from mine. It's more like something you might use in a digital system, not analogue.

You really need to understand common-emitter and common-collector tolopolgies before you can embark on a project like this.

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Another transistor is needed, and some resistors. If clock voltage is 3.3V or anything lower than the Power voltage (12V) you cant turn Q4 OFF, a current will flow from the higher voltage to the lower voltage and will keep Q4 ON, that is why Q1 is needed. when Q1 is not conducting Q4 base is held at 12V trough R3 and R2 resistor so Q4 shuts off. R4 is important and cannot be lower than ~3k because when we have a LOW clock Q2 conducts and will have a voltage of ~0.6V (almost ground from Q4 point of view on the base), this will form a voltage divider between R2 and R4 and if low enough will trigger Q4 to turn ON, R4 is a must but the high value will limit the current output of Q2 so we also add R3 to limit Q4 current to be as equal as Q2

enter image description here

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  • \$\begingroup\$ Please explain why the other transistor and resistors are needed. \$\endgroup\$
    – Null
    Oct 22, 2021 at 20:29
  • \$\begingroup\$ @ConstantinSirbu . I think Null was trying to get you to put the information into your answer, using the Edit. (Not here in the comments section) \$\endgroup\$
    – Marla
    Oct 22, 2021 at 21:50
  • \$\begingroup\$ First, thanks for actually answering the question. Second, there will be considerable cross-conduction ("shoot-through") current through Q2 and Q4 as the Q1 collector changes from high to low, because the voltage rise on the collector when it turns of is pretty slow. Also, the output transistors turn off much more slowly than they turn on \$\endgroup\$
    – AnalogKid
    Oct 22, 2021 at 22:43
  • \$\begingroup\$ @AnalogKid yes, there is a little cross-conduction, for this components values the switch on and off slope is 1uS, the current of the cross-conduction is ~20mA for 1uS, its not an issue, you cant expect more from a 3 components circuit :) \$\endgroup\$ Oct 23, 2021 at 9:25
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You will burn Q1 and Q2 in that way. Try using something like this circuit. You may need to replace BJTs with more powerful transistors like BCX56 and BCX53. By the way, if you need to change your PWM signal to an analog signal, you have to add a simple low-pass filter like a RC circuit, before applying the signal to the amplifier. However, a speaker may act as a low pass filter and there might be no need to add a low-pass filter. enter image description here

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