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1) An NPN transistor in cut off mode:

enter image description here

"To get a transistor into cutoff mode, the base voltage must be less than both the emitter and collector voltages. VBC and VBE must both be negative. In reality, VBE can be anywhere between 0V and Vth (~0.7V for silicon) to achieve cutoff mode."

a) I've also read that both the base- emitter and base- collector junction will be reverse biased in cut off mode. But how? If the emitter is earthed, then even if Vbe (=Vb?) is less than 0.7V, the base is at a more positive voltage than the collector and consequently it is forward biased, right?

b) Also, why do we need to ground the input and the base if Vbe is already less than 0.7V? (How is the base grounded in the figure? I can see only the input being grounded)

2) In Saturation mode

enter image description here

a) This, I can understand because the collector voltage becomes close to zero during saturation and thus both Vc and Ve are less than 0.7V (and are thus forward biased)

b) But, why do we connect the input and base to Vcc?

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  • \$\begingroup\$ If the emitter is earthed, then even if Vbe (=Vb?) is less than 0.7V, the base is at a more positive voltage than the collector .. why? \$\endgroup\$
    – Huisman
    Commented Feb 27, 2019 at 9:41
  • \$\begingroup\$ Regarding Vbe (=Vb?) : How would you define Vb? \$\endgroup\$
    – Huisman
    Commented Feb 27, 2019 at 9:45
  • \$\begingroup\$ Vb is the potential at the base. And Vbe= Vb - Ve. Since Ve= 0, I thought Vbe= Vb. \$\endgroup\$
    – Gokulakrishnan Shankar
    Commented Feb 27, 2019 at 13:18
  • \$\begingroup\$ Which is correct \$\endgroup\$
    – Huisman
    Commented Feb 27, 2019 at 17:47
  • \$\begingroup\$ Surely the maximum collector current for the saturation mode cannot be V_CC / R_L. Not unless beta = infinity, or at least very large (large enough for I=V_CC/R_L) to flow? It is not the case that usually one states what the saturation current for the base is and that the emitter saturation current = (beta+1) * base current. Then one calculates V_CE at saturation? \$\endgroup\$
    – user3728501
    Commented Nov 11, 2020 at 15:30

3 Answers 3

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1a) I'd say both are correct. At any voltage Vbe < Vth the transistor will "cut off", where by "cut off" we mean "the current drops to a super-low value, and gets even lower as Vbe drops further". It's always an approximation -- do we say the transistor is "cut off" once the current is less than a milli-amp? Or less than a micro-amp? For a milli-amp, driving Vbe down to 0.1V might be good enough. For a micro-amp we might need to drive Vbe to 0.0V or even a negative voltage.

1b) Vbe is less than 0.7V because we have tied the input to ground. The base is "grounded" because it is tied to 0V through Rin.

2a) Not actually a question ;-)

2b) We are using Vcc as a convenient voltage to drive Vin high, so that we can drive Vbe to a nice positive voltage and turn the transistor on.

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  • \$\begingroup\$ 1a) So, driving Vbe to 0.1V is technically forward bias, right (since the emitter is grounded)? But because the current becomes super- low, it's equivalent to saying that it's in reverse bias, correct? Thanks :) \$\endgroup\$
    – Gokulakrishnan Shankar
    Commented Feb 27, 2019 at 7:22
  • \$\begingroup\$ At any voltage Vbe < Vth the transistor will "cut off"? Seems you're mixing up with mosfets... \$\endgroup\$
    – Huisman
    Commented Feb 27, 2019 at 9:34
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    \$\begingroup\$ @Huisman how so? Yes a MOSFET is more traditionally analyzed in terms of its gate voltage, whilst a BJT is typically analyzed in terms of its base current, but it's perfectly valid (and in some cases preferred) to analyze a BJT's response in terms of its base-emitter voltage instead of its base current. \$\endgroup\$
    – Mr. Snrub
    Commented Feb 27, 2019 at 15:52
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    \$\begingroup\$ The Vth term is normally only used for MOSFET's in my experience. \$\endgroup\$
    – user57037
    Commented Mar 1, 2019 at 5:03
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    \$\begingroup\$ That's exactly why my question of "How so?" should taken at face value :-) i.e. not as an attempt to be defensive, but rather as a request for clarification. The point of this site is to teach people and provide high-quality answers, not to prove how superior any one individual's knowledge might be ;-) \$\endgroup\$
    – Mr. Snrub
    Commented Mar 1, 2019 at 5:48
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"But, why do we connect the input and base to Vcc?"

You don't have to. It's just that it's a convenient way to introduce you to the issue.

As a general rule, a transistor is saturated when the base current is more than about 1/10 the collector current. So, in your circuit, when the transistor is saturated, Ic is Vcc/RL, and the base current is about Vcc/Rin. In this case, Rin < 10 RL.

But there is no need to use VCC. You can use any (positive) voltage source, as long as you adjust Rin to keep the base drive great enough.

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  • \$\begingroup\$ It is good practice to actively pull the base low -- it'll turn off faster, and it'll keep leakage currents from turning it on. \$\endgroup\$
    – TimWescott
    Commented Feb 18, 2022 at 2:25
  • \$\begingroup\$ @TimWescott - If the input is a voltage source which goes from 0 to some logic level, the base input resistor serves as a pulldown resistor when the input is low. \$\endgroup\$
    – WhatRoughBeast
    Commented Feb 19, 2022 at 0:24
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1a) Wherever you read that, I disagree. If Vb > Ve then the base-emitter junction is forward biased (and emitter current will flow, however small).

1b) The base is grounded through the resistor. You could leave the base floating, but pulling it low makes the transistor turn off faster, and more positively. Leaving it floating would mean that reverse leakage current from the collector would become emitter current, which would increase the collector current.

2b) You connect the base to Vcc (via the resistor) so that base current will flow and turn the transistor on.

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