# Total Power Dissipation - Design Margin

It is good practice to ensure some design margin for the electronic circuit in terms of absolute maximum ratings.

What is the proper way of selecting such a margin for Total Power Dissipation?

Let's assume 20% as a safety margin for any reason and SOT363 NPN Transistor as an example:

On the chart below there is a common power derating curve for BC847 NPN Transistor in SOT363 Package - [Blue].

I calculated the -20% Power alternative [Green] it looks good however the closer we get to the Absolute Maximum Temperature Rating [150C] the smaller the margin becomes. This is why I wonder if it is a proper way of doing this?

As an alternative, I added another line which is basically -10C of the base the value [Green].

Is there a way to define something "in-between"?

• I'm not sure that curve is accurate without knowing the PCB thickness, weight, and footprint it's mounted on. Feb 28 '19 at 21:28
• As well as any margin calculations people advise - note that graphs are usually "typical ratings unless otherwise specified. Look at tabled specs to get some idea of how much typical and max and min values compare. Mar 1 '19 at 1:16
• For the Thermal characteristics, the Maximum thermal resistance values are defined, so it should not be worse than what I presented here.
– KJA
Mar 1 '19 at 6:18