I'm not familiar with electronics at all, and would like to get some ideas to implement frequency multiplication of LVCMOS.
I want to multiply the frequency in the range of 250 kHz by a factor of 10 or 20 and the input and output signals should be in phase with less jitter.
Most of commercially available PLL clock synthesizer set the lowest input frequency limit at MHz and hence kHz frequency signals are not accepted.
I'm wondering whether any products that I have not found for my task? If I need to design a circuit by myself, what is a suitable IC?
Much appreciated for your kind help and suggestions.