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I have asked about this before but I have to admit that I didn't read enough before asking and therefore was'nt able to ask the question properly. I hope I am now.

I'm designing a 4 layer board with 46 analog inputs (rotary and slide potentiometers) and 45 digital inputs (momentary push buttons). The board is controlled by a teensy 3.6. I'm using 8-channel multiplexers (M74HC4851, datasheet) since the teensy doesn't have enough inputs. The multiplexers are decoupled by a 0.1uF cap each close to their vcc pin.

I'm wondering how I should shape the ground layer. I know that the most common advise in this forum is to not shape it at all and arrange the components in a smart way instead but since my layout ist mostly determined by the hardware user interface this is not really an option in my case.

Option a) Option a) My first idea was to separate the analog area from the digital area completely by a weirdly shaped moat and connect the analog area to teensy's agnd pin, but I learned that it's not a good idea to let signal lines cross that moat and every single analog component is connected to the multiplexers which are probably the noisiest components on my pcb.

Option b) Option b) My second idea was to use several moats to force the digital return currents to not cross the analog area but then I wondered if this wouldn't create several ground loops on my board. In this case (and the following cases) I wouldn't use the agnd pin of the teensy at all.

Option c) Option c) I could leave only one opening in the moat, put the multiplexers close to it and guide all signal lines through this opening (on their own layers of course) but this would make routing rather complicated and lead to rather long signal lines (the board is 35 by 23 centimeters or 13.3 by 9 inches)

Option d) Option d) My last idea was to use one solid plane and move the multiplexers to a remote area on the board. This would have similar downsides as option c) and wouldn't control the return currents of the push buttons at all.

What's my best option? What would you do? (If moving the input components was not an option)

I'm sorry for my probably very noobish approach and thankful for your answers in advance!

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I suggest you use ONE plane. All your analog sources are ON THE PCB, right?

Encourage the digital noise to remain in the MCU, by using 100,000 ohm resistors between the MCU and the logic inputs to the analog multiplexors. Adding 100pF caps may be key, as the caps help shunt any high-freq trash to Ground, reducing the trash entering your MUX logic inputs, which would upset the MUX Ground pins etc as the Trash explores ALL possible return paths back to the MCU.

Further encourage the digital noise to remain in the MCU, by establishing a cascade of RCRC filters in the VDD to the MCU. I call this a "local battery", which is tasked with providing the high-speed-charge demands of the MCU. You will still have Ground Loops, but you won't care, because the currents in the Ground Loops will be very small and of very low frequency.

Thusly

schematic

simulate this circuit – Schematic created using CircuitLab

Notice we also use the "local battery" idea, to provide very clean VDD to the analog MUXES. Otherwise the VDD trash gets injected thru the large switch capacitances (FET gate-channel capacitances) into your signals.

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  • \$\begingroup\$ Thank you very much for your answer! Unfortunately I'm not sure if I fully understand it and I have many detail questions due to the fact that I'm such a bloody beginner. It's mostly about component placement. 1.) R1,R2 & C1: It looks like they're just the beginning of a series, how many of them would you use? Shall I place them close to the MCU before VDD enters the power plane? Or just distribute them over the PCB, connecting ground & power plane? \$\endgroup\$ – mr_highway Mar 5 at 11:53
  • \$\begingroup\$ 2.) R3, R4, C4 & C5 so you would use two bypass caps and 2 resistors per analog MUX, close to their VDD pins? \$\endgroup\$ – mr_highway Mar 5 at 11:54
  • \$\begingroup\$ 3.) R5, R6, C7 & C8: So one resistor and one cap per logic input? Shall I place them as close as possible to the MCU and connect several MUXes to it or is it neccesary to do once for every single MUX? Thank you for your help! \$\endgroup\$ – mr_highway Mar 5 at 11:58
  • \$\begingroup\$ Regarding R5,R6,C7,C8 logic-filters --- place them as convenient. The current thru 100Kohm is small. so the high-frequency current being shunted into Ground plane will also be small. The already small Ground current will spread out to use multiple paths back to the MCU. Yes; you can connect several MUXes to each (filtered) RC. \$\endgroup\$ – analogsystemsrf Mar 5 at 15:59
  • \$\begingroup\$ Regarding R3,R4,C4, C5 MUX VDD filters --- place C5 real close to the MUXes. That 1uF value is designed to provide filtered, clean, local-battery power to all your MUXes from just ONE capacitor, if you wish. If you wish. Your MUXs draw no DC power, right? Then using only C5 at the MUX VDD should be good. Use R4 and the trace between top of C4 and top of C5 as your routing flexibility, so you DO NOT SHARE THE VIAS at the Ground end of C4 and C5. I'd keep those GND vias at least 2cm apart. Do not route any fast-edge logic signals near the trace between C4 and C5. \$\endgroup\$ – analogsystemsrf Mar 5 at 16:11

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