In the diagram below the npn transistor is in the cutoff region. The book says that both EB and CB junction are reverse biased. My question is about:

A) the EB junction. How is it reverse biased? Isn't it zero biased since both base and emitter are grounded?

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B) also the book says that in cutoff region entire Vcc will be available at output. But what about the voltage drop at resistor connected to collector? Isn't output voltage supposed to be less than Vcc even in cutoff region?

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    \$\begingroup\$ About B –in addition to AK's answer below– the book assumes that Vout is measured with a voltmeter having infinite (in theory) internal resistance. Since the voltmeter draws zero current (in theory), there will be zero voltage drop across RL thus Vout will be equal to Vcc. \$\endgroup\$ – Rohat Kılıç Mar 5 at 5:26

A) I would agree with you, that the b-e junction is neither forward nor reverse biased, but that might be just a semantics thing. From the diode's point of view there is no practical difference between applied voltages of +0.1 V and -0.1 V, but in my head there is. Your results may vary.

B) No. Assuming an ideal transistor, one with zero leakage current, then if there is zero current through the resistor, there is zero voltage drop across it. Note: there will be a voltage drop proportional to current going through Rl to whatever the circuit is driving downstream.


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