I have a design problem to solve. The problem statement goes as follows: "Design a clocked comparator resolving input voltages close to vdd dissipating less than 100 uA".
What does "resolving input voltages close to vdd" mean? Does it mean that if the input voltage is close to vdd then the output should go to vss, depending on the reference voltage? It would be nice if you guys could explain it to me with an example.