# UnRouted Net Constraint in Altium after Via Stitching

I am just wrapping up my Design of one of my project in Altium 17. I was done with adding Polygon Pour for various nets. I was trying to add Via Stitching in Altium.

After adding the stitching, Altium Design Rule Check shows an error. See the screenshot below:

It has been showing multiple of these errors. The nets and vias are actually connected with copper. I remember facing these problems earlier but I don't remember how I get sway with them. May I tried removing specific vias after Via Stitching and it solved the problem in the past but It is not helping me now.

I tried the suggestion in this link by disabling the "Check for incomplete connection" option and it solved the issue but I want to enable the option for detecting real issues.