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I was looking for related questions here, and the closest one I could find was this one: Industry Practices for Schematic Design?

However, it does not address my specific question, so here goes: I am not an EE and am just trying to learn Eagle so I can break my reliance on ExpressPCB, which I have found to be okay for simple projects, but being stuck with their proprietary format, tool, and fab no longer appeals to me.

In my past, limited experience with making schematics, I lay out the pins in numerical order, which is typically pin 1 to (N/2) from top to bottom on the left, then pin (N/2+1) to N from bottom to top on the right.

While that's fine and all, I'm now laying out a board for the MCP73123 to test a LiFePO4 charger (because of my other post here) and noticed that in Microchip's datasheet, they lay out their schematic like this:

enter image description here

Personally, I would think this is the way to do it, since CAD/CAE tools know what the correct pin assignments are anyway, and this looks a heck of a lot cleaner in the schematic since related pins are within close proximity of each other.

So my question is simply, do you experienced PCB designers typically do this, or do you go with the numerical-order approach? What do you consider to be the pros / cons of each approach. Also, is there another methodology?

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    \$\begingroup\$ Yep we do that all the time. Typically you make the schematic symbol so it's easier to read, and easier to wire up. Which is what they've done in your example. Like you said when it gets to layout the pins will be where you want them. Just be careful that your footprint has the pins in the right place. It's easy and common to mess up the pin arrangement on say a sot23 (3 pin device). If there's ever going to be a doubt I usually draw a sketch of the foot print pin numbering on my schematic. \$\endgroup\$ – Some Hardware Guy Oct 2 '12 at 13:49
  • \$\begingroup\$ When you first make or import the schematic symbol, the pins may or may not be in order, but CAD systems have a function that allows you to move the connections around the symbol while keeping them associated with the correct pin number. \$\endgroup\$ – Jeanne Pindar Oct 2 '12 at 14:49
  • \$\begingroup\$ Often, some of the bookkeeping-type pins, like power and ground, are even put into a separate gate that assumes input from certain standard nets and made invisible! I always like to verify they're connected the way I like by using the invoke command to call them up. \$\endgroup\$ – Scott Seidman Oct 3 '12 at 22:38
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This is a no-brainer, use the functional layout approach. There are a lot of bad schematics out there, including professional ones, so you will see pin order schematic layout sometimes. However, it is a bad idea.

Pin-order symbols is mostly laziness on the part of someone defining the part in the CAD system. Slapping everything down in the pin order is easier than digging out the full names and functions of each pin. Of course this isn't usually the stated reason. The most common excuse is that it aids in debugging. However, a little thought reveals that is not so.

When you are debugging a new board, you have both the board and schematic in front of you. Think about the usual work flow. Which is more common: "I want to look at the clock line, which pin is that?", or "I want to look at pin 5, which function is that?"?. Clearly the answer is the former, by a lot. Yes, occasionally early in the debugging process you may want to go around a IC and look at the signal on every pin, but that is usually once, if at all. There are cases where pin-order helps, like for some repair work, but for every one of those there are multiple cases when function order is better. Functional pin depiction is actually better for debugging than pin-order depiction. Don't get taken in by the excuses for not spending time on the symbol definition once.

Then there is the other considerable issue of schematic clarity. Here there is no contest at all. Pin order obfuscates the circuit and either forces a lot of air wires or forces other blocks to be put in inconvenient places.

For more on good schematic practises, see my more lengthy writeup on the subject.

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  • \$\begingroup\$ fabulous answer, Olin, thanks. I was pretty sure the functional approach made the most sense, but you made very clear points in its favor. I'll read your writeup now! \$\endgroup\$ – Dave Oct 2 '12 at 13:59
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    \$\begingroup\$ I am sorry, I strongly disagree that there is only one way to approach this. \$\endgroup\$ – Rocketmagnet Oct 3 '12 at 21:53
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Olin and I have "agreed to disagree" on this topic. While I wholeheartedly endorse his approach for fixed-function ICs where each pin has a well-defined function and direction, I don't think it makes sense to try to enforce this approach for general-purpose chips such as microcontrollers and FPGAs, where pretty much every pin can be defined as an input or an output depending on the specific application.

Since I don't want to create a unique schematic symbol for the part for each application, the pins need to be organized in some arbitrary order on the symbol. It makes sense to group the pins for each "port" or "bank" together, and since they're usually grouped that way on the physical device anyway, I argue that using the physical pin order on the schematic makes more sense than any other arbitrary order.

For one thing, it helps you do some pre-planning with regard to the layout while you're doing the functional pin assignments, since the grouping of components and connections on the schematic corresponds more closely to the physical layout, at least in a general sense.

And it really does help with debugging (probing) the physical prototype. With high pin count devices, it really helps you keep your bearings if you can see the same pattern of, say, power and ground connections on both the schematic and the layout near the pin you're trying to probe. I don't know about you, but I tend to lose count when trying to find a particular pin on one side of an 84-pin fine-pitch QFP.

However, these comments do not apply to really high pin count devices in BGAs. For one thing, you're not generally trying to probe them directly, and for another thing, the schematic symbol is probably broken up into multiple sections. For these devices, purely functional grouping on the symbol makes sense again.

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  • \$\begingroup\$ I agree that its not worthwhile to make a new symbol for every design. But using physical pin order gets really nasty for even what are nowadays very modest FPGAs. First of all, you can't really represent a BGA very well on a schematic. Second, even for QFP type packages, the symbol gets extremely large if you make it square. \$\endgroup\$ – The Photon Oct 2 '12 at 16:11
  • \$\begingroup\$ Good point about the high pin density formats! I'd agree that in such a case, it would be nice to have a 1:1 correlation between the schematic and the physical package. \$\endgroup\$ – Dave Oct 2 '12 at 16:13
  • \$\begingroup\$ Oh, and then you get in to pin swapping. If your layout tool lets you swap pins and then back-annotate the schematic, it will probably just renumber the pins on the schematic (e.g. not try to re-draw the wires). Which is just looking for trouble if 90% of the pins are in physical order, but the one important one isn't. \$\endgroup\$ – The Photon Oct 2 '12 at 16:19
  • \$\begingroup\$ @ThePhoton: With these types of devices, I'm not generally pin-swapping in the layout stage. In the first place, I've already got good pin assignments in the schematic, and in the second place, pin swapping on this sort of device requires coordination between the internal functionality and the external functionality anyway. Layout is not the place to be doing it; fix it in the schematic first. \$\endgroup\$ – Dave Tweed Oct 2 '12 at 16:38
  • \$\begingroup\$ @DaveTweed, the reason you do pin-swapping is because you realize that routing is improved by changing pin assignments. Of course its good practice to think ahead and make good assignments when first doing the layout. But other times its more practical to do schematic-level thinking while working on the schematic, and worry about routing issues when you're doing the routing. But of course everybody has different habits and processes, and different tools can make a difference in what is the most effective way to do things. \$\endgroup\$ – The Photon Oct 2 '12 at 16:52
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The schematic exists to:

  • Help you design the circuit
  • Help you debug the circuit
  • Help other people understand the circuit

You should do whatever you need to do to satisfy those requirements. Personally, I have laid out chips every kind of way depending on my needs for that particular circuit.

I have laid out the pins for microcontrollers in pin order, matching the real device. (And FakeName now probably thinks that's how I always lay out my symbols). I sometimes arrange create a different schematic symbol for a device for every application, because that's what makes my job easier in those cases. I sometimes arrange small devices in pin order, sometimes in function order.

If you're going to lay out a microcontroller in function order, when what function order?

PIC32 symbols

This is the same PIC32 drawn different ways. The first in some generic function order, the second in an order for a specific circuit. As you can see, the left hand symbol is about as useless as a pin order symbol. So if you choose the function order route, be prepared to draw a different symbol for each circuit.

I almost always draw connectors to match the arrangement of connections on the actual connector. This really helps stop me wiring up the connector backwards (which I seem to do a lot). I even try to draw in details of the connector, so that when I'm debugging, I can easily correlate the connector on the board with the symbol.

Connector symbol

Whatever you do, do it because you find it helpful. Do it whatever way helps prevent you making mistakes. And whatever way helps you to debug the board. Don't listen to anyone else tell you there's only one way to do it. Don't be ashamed to do it your way.

Whatever way you choose, it may never fully satisfy you. I find that some parts are best drawn in function order for the design of the circuit, but when it comes to debugging, I wish I had another version of the symbol in pin order, and I end up opening up the datasheet, searching for the pin information, and reading through the large number of functions for that pin, trying to remember which one I used. Or I have to look right around the symbol several times trying to find pin 139.

If the schematic must be read by other people too, you should take bear them in mind when you choose your method.

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    \$\begingroup\$ No, it's not all about just you unless you are your own shop and you'll be the only one ever looking at the schematic. When other people are envolved, then you have to consider the overall picture. Doing your job in isolation driven only what is easier just for you is irresponsible. If you're going to draw the schematic once but 100 field technicians have to look at it twice a week, then optimizing it just for you at the expense of them is just plain wrong. A good boss will catch that, but too often it is over their head and you end up with bad schematics. \$\endgroup\$ – Olin Lathrop Oct 3 '12 at 22:04
  • \$\begingroup\$ @OlinLathrop - If you read my answer, you'd know that that's exactly what I said. \$\endgroup\$ – Rocketmagnet Oct 3 '12 at 22:15
  • \$\begingroup\$ I like your point about there not being just one functional way to draw a component's schematic, that makes a lot of sense. \$\endgroup\$ – Dave Oct 3 '12 at 22:44
  • \$\begingroup\$ @Rocket: I did, and I don't. For example, I really object to Whatever you do, do it because you find it helpful. There are other people on this planet too, so if you don't work in isolation that is really irresponsible. \$\endgroup\$ – Olin Lathrop Oct 3 '12 at 23:36
  • \$\begingroup\$ @OlinLathrop - Look at the first three bullet points. You'll see that I made that point right near the beginning of the answer. I made it again at the end. Are we reading the same thing here? \$\endgroup\$ – Rocketmagnet Oct 4 '12 at 7:48

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