I am trying to integrate a DC tension with a classic op amp integrator. The problem is : when I simulate my circuit on LT Spice, the output will always be equal to the VEE tension of the op amp regardless of the 1/RC coefficient. If anybody can help me on this problem, I put the circuit and the graphics below.
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1\$\begingroup\$ You have a DC gain of 1000, and 2V applied to the input. Why wouldn't you expect the output to settle at the negative rail? \$\endgroup\$– Phil GMar 7, 2019 at 17:04
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1\$\begingroup\$ Integration time is 1V/s and decay time is 1000s neglecting leakage current in cap and input bias offset. If steady state says the output is saturated, then look at the startup and initial condition. Null offsets are sometimes used in Integrators with low input Vio. You do not want to apply an offset, do you? if so why? \$\endgroup\$– Tony Stewart EE75Mar 7, 2019 at 17:04
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\$\begingroup\$ Do you have to build this circuit? Good luck finding a 1mF film capacitor. \$\endgroup\$– Caleb ReisterOct 11, 2019 at 6:49
2 Answers
The problem is with the solver, it's finding the wrong DC operating point. The solver first tries to find the point that the circuit is operating at, then runs the simulation. In the case of this integrator, it's wrong. So you either need to set initial conditions on the capacitor OR force the solver to recognize that the voltage is zero. One way to do this is with a PWL supply, starting it at zero, then at 1us or shortly after the simulation starts, then move the supply to 2V.
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\$\begingroup\$ This is a valid method, however note that the starting output voltage will be the Vos the op-amp model has multiplied by -1000, which may or may not be close to zero. \$\endgroup\$ Mar 7, 2019 at 22:46
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1\$\begingroup\$ The Vos for the TL084 is nominally 3-5mV, so it will still be in range. Not a great amp to use for a high gain application \$\endgroup\$– Voltage Spike ♦Mar 8, 2019 at 3:45
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\$\begingroup\$ I would recommend setting the initial conditions. Something like
.ic n=0 out=0
should work, assuming that the inverting input is named n and the output is named out. \$\endgroup\$ Oct 11, 2019 at 6:47
You have a two volt signal applied to the input so it will always start saturated at the negative rail unless you set the capacitor initial conditions to something like 0V, or at least within the operating range of the op-amp.
You can try Ctrl-Right Click on the capacitor. Change as below to add IC=0 for zero volts at t=0, or select "skip initial operating point solution" in the simulation (which may have other side effects).