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I'm designing a board with cortex-m4f having only SWDIO and SWCLK.

I'm drawing schematics for J-Link's 9-pin JTAG/SWD connector, and I wonder if I can leave the SWO/TDO and TDI pins floating.

J-Link's user guide says that:

  • Pin 6(SWO/TDO): JTAG data output from target CPU. Typically connected to TDO of the target CPU. When using SWD, this pin is used as Serial Wire Output trace port. (Optional, not required for SWD communication)

  • Pin 8(TDI): JTAG data input of target CPU.- It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI of the target CPU. For CPUs which do not provide TDI (SWD-only devices), this pin is not used. J-Link will ignore the signal on this pin when using SWD.

I guess "not used" means that I can safely leave them floating, but I'd like to be sure.

Can I just ignore the pins and leave them floating on the target board?

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I'm drawing schematics for J-Link's 9-pin JTAG/SWD connector, and I wonder if I can leave the SWO/TDO and TDI pins floating.

Yes, you can. The debugger will ignore the state of these pins, so leaving them floating is fine.

If you are only using basic SWD (i.e, no SWO and no reset), a more commonly used pattern is to break out GND, SWCLK, SWDIO, and Vcc on a 0.1" header and use flywires to connect them to a debugger. For instance, this pattern is used on some STM32 Discovery boards, as well as on many unbranded STM32 development boards.

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  • \$\begingroup\$ Go a step further and figure out how you can hit those pads (along with power, reset, and maybe a debug UART) with a pogo-pin jig in production. Soldering headers and plugging in cables is great for development, but it doesn't scale. And the placement of the connector footprint relative to features like holes and unpopulated under side areas which can be used for fixturing can make production setup a lot easier or harder. \$\endgroup\$ – Chris Stratton Mar 7 at 19:50
  • \$\begingroup\$ Thanks. Can I leave the nRESET pin floating too? I'm going to disable nRESET pin and use it as a GPIO on the MCU, so I don't need nRESET. Should I pull it up on the debugger side too? \$\endgroup\$ – Inbae Jeong Mar 7 at 19:54
  • \$\begingroup\$ @ChrisStratton Yes, I'm thinking of using pogo pins in production, but it's still in the dev-phase with an MCU I've never used, so I'd like to stick to the header way for now on the development board. Thanks for the info. \$\endgroup\$ – Inbae Jeong Mar 7 at 19:58
  • \$\begingroup\$ Sure, what I mean is position the header footprint such that you can simply leave it off production boards and hit the exact same plated holes with pointy pogos (or solder headers on misbehaving returns for extended debug) Thinking about it now will save you an awkward situation or redesign later. \$\endgroup\$ – Chris Stratton Mar 7 at 20:02
  • \$\begingroup\$ @duskwuff It's possible to disable it on nRF52840, which is a cortex-m4f. nordicsemi.com/DocLib/Content/Product_Spec/nRF52840/latest/uicr says that P0.18 and P1.18 pin can be configured as either a GPIO pin or a reset pin with the PSELRESET register. \$\endgroup\$ – Inbae Jeong Mar 7 at 20:09

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