In the attached image, without C1 & C2 (used only as de-cap) mounted, when 24V is given at TP1 and nMOS (Q1) is turned ON, the circuit works fine and I get 24 V at TP3.

But when C1 & C2 are mounted and as soon as 24V is given at TP1 and nMOS (Q1) is turned ON, the pMOS goes bad and there is short-circuit between source & drain. The capacitors C1 & C2 are good as I checked them.

Can anybody expalin what coud be the reason? Is it because of sudden inrush voltage from the charged capacitors C1 & C2?enter image description here

  • \$\begingroup\$ That's correct. Why do you have two large capacitor banks on either side of it? Can you precharge though a resistor? \$\endgroup\$ – winny Mar 8 '19 at 8:32
  • \$\begingroup\$ Thanks Winny. I can try that. I suspect that the inrush from capacitor is going above the Vgs rating of pmos. \$\endgroup\$ – TurnCity Mar 8 '19 at 8:44
  • \$\begingroup\$ Vgs has very little to do with it. What's the peak current capability of the PMOS and what's the ESR for either capacitor bank? With some additional circutry, you could built yourself a constant current source from that PMOS to softstart everything. Google it and you should find plenty of examples. \$\endgroup\$ – winny Mar 8 '19 at 9:34
  • \$\begingroup\$ Thanks for the input Winny. I will check on this. \$\endgroup\$ – TurnCity Mar 8 '19 at 12:11

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