I am trying to build a measurement circuit that is capable of measuring voltage signals in the order of micro volts.

Signal Characteristics:

Voltage: Anywhere between 1 uV to 100 uV

Frequency: Minimum 10 kHz to maximum of 50 kHz.

The signal needs to be converted to the frequency domain. It is very important for me to measure the odd harmonics. I am planning to do this on a PC after ADC processing.

Current Design:

Currently I am using a 24 bit ADC ADS127L01 from Texas Instruments. I have followed all the design recommendations. I am using a reference voltage of 2.5 V and as per the datasheet will be using an ADC driver THS4551 as well.


Do I need to use an instrumentation amplifier for this design? I do not think it will be very helpful as I am using a 24 bit ADC, but I am worried about losing bit resolution due to noise and layout issues.

  • 1
    \$\begingroup\$ How much dynamic range do you need (or what precision do you need to measure to? 1 uV? 100 nV? ...) Rather than pay for a 24 bit ADC and only using 10 bits of its dynamic range, it might be cheaper/easier to use an in-amp and a 10 or 12-bit ADC. \$\endgroup\$
    – The Photon
    Commented Mar 8, 2019 at 17:11
  • \$\begingroup\$ What kind of amplifier your need would depend on the source characteristics – i.e. how "heavy" a load it could drive until the 1 µV simply breaks down. Notice that at room temperature, 50 kHz of bandwidth equals to a noise power of \$P=k_B B T=-204\text{ dBW/Hz}+43\text{ dBHz} = -161\text{ dBW}\$. If your amplifier has an input impedance of say 100 kΩ, \$P=\frac{V^2}R\implies V =\sqrt{10^5\cdot 10^{-16}}\text{ V} = \sqrt{10}\sqrt{10^{-12}}\approx 3\text{ µV}\$. Your 1 µV resolution would make no sense, simply because noise is three times higher in amplitude. \$\endgroup\$ Commented Mar 8, 2019 at 17:18
  • \$\begingroup\$ Tell us the maximum voltage you want to measure (you quote \$100\mu\mathrm{V}\$, but you don't say if that's DC, RMS, or peak-peak), the frequency range (does it go down to DC? If not, how low? And what's the top end?), and what you really need to resolve. Because if you really have a \$0-100\mu\mathrm{V}\$ range and you only need to resolve to \$1\mu\mathrm{V}\$, then after sufficient fiddling with amplifiers you could use an 8-bit ADC -- I don't think that's what you mean. \$\endgroup\$
    – TimWescott
    Commented Mar 8, 2019 at 17:28
  • \$\begingroup\$ @ThePhoton I am trying to design a circuit that can give me a precision of 1 uV. \$\endgroup\$
    – Ryan Locke
    Commented Mar 8, 2019 at 17:40
  • 1
    \$\begingroup\$ What is the SPECIFIC ADC? What is the ENOB at your max frequency. You often lose a surprising number of bits. \$\endgroup\$ Commented Mar 8, 2019 at 18:44

5 Answers 5


Here is a 3-stage 90 dB (30,000:1) non-instrumentation-amplifier circuit, using the OPA211 with its 1 nanoVolt/rtHz noise floor; in 100KHz bandwidth that becomes 316x (sqrt(100,000)) larger at 0.3 microVolts Referred To Input (RTI). Input signal is 100 microVolts PeakPeak. The FOI Frequency Of Interest (see top rightcorner), used for SNR and ENOB, is set to 50,000Hz. Prior to the ADC (24 bits, 200,000 Hertz Fsample) I included a RC low pass filter of 200KHz bandwidth, to ensure the harmonics are included.

Result (with all the Gargoyles ---- the Interferers ---- turned off) is 5.7 bits --- broadband random noise. If you narrow the bandwidth by 10 octaves, or to 200Hz FFT bins, your floor should be improved by 30dB, or 5 more bits, to about 0.1% RMS error.

enter image description here

If you want, I'll add some specific HFI such as black-bricks, or EFI such as nearby MCU clocks, or PowerSupply trash, or Ground upsets.

===== result of adding 3 electric field interferers and 1 Ground interferer =======

YOU ARE IN LUCK. Despite only 1milliMeter spacing from electric field (EFI) interference with MCU clock, 60Hz power wire, and 60Hz power with SPIKES, to the various Signal Chain nodes, the FILTERED OUTPUT into ADC still provides 5.7bits. Advice: keep the MCU clock and MCU output traces at least 1mm away from the Signal Chain. Ditto for power wiring (and any unfiltered external VDD traces).

Why does EFI not degrade the Signal Chain? Because ALL the nodes are LOW impedance, and the displacements currents induced by changed electric fields are below 1 millivolt. Notice the Random Thermal Noise remains the dominant Code Spread cause.

enter image description here

If the RC LPF is "deselected", then the total Aggressors increased from 354 microVolts, to 14,000 microVolts, and the ENOB drops from 5.7 to 4.9 bits.

========================= design details ===================

Sensor: 0.5 ohms and 1uH

Stage#1: 1nanoVolt/rtHz noise density; Rg (to ground) 26 ohms; Rfb 497 ohms

Stage#2: 1nanoVolt noise density: Rg 19 ohms; Rfb 282 ohms

Stage#3: 1nanoVolt noise density: Rg 95 ohms; Rfb 9,400 ohms

Stage#4: 200KHz RC LPF R = 1,590 ohms; C = 500pF

Stage#5: ADC 5volts PP; 24bits, 200,000Hz Fsample, Rin = 50 ohm, Cin = 48pF

=========== Are ALL the nodes Low_Z, so EFI is mostly ignored? ========

Yes. Here is Zout of Stage#1

enter image description here

Notice the EFI energy (capacitively coupled into ALL the nodes) arrives at a rather LOW output impedance for OpAmp #1, because the OpAmp has 45MHz Unity Gain BandWidth and has strong control of the OpAmp output voltage up to 1MHz.

  • \$\begingroup\$ @analogststemsrf Wow this is great! Thank you for your help. \$\endgroup\$
    – Ryan Locke
    Commented Mar 9, 2019 at 17:26
  • \$\begingroup\$ Do you have any expected nearby Interferers? (in SCE, we call those the Gargoyles). MCU clocks are a problem. MCU Output pins, with burst-data (random patterns) are a problem because of the low-frequency burst occurrence, difficult to filter out. All opamps have poor ability to reject PowerSupply trash at high-frequencies. And Ground currents that CHANGE (for example the MCU currents will change as the program activity changes) will cause VgroundA to not be the same as VgroundB. We model all of those, as HFI/EFI/PSI/GPI. \$\endgroup\$ Commented Mar 10, 2019 at 3:02
  • \$\begingroup\$ I think the MCU clocks will be a problem as the board will be quite small. I am using an LDO to regulate power and I am not using any switching supplies, so I am not sure if the power supply trash should be a factor. If it is not too much trouble, it will be great if the interference from the clocks and ground upsets can be modeled as well. \$\endgroup\$
    – Ryan Locke
    Commented Mar 10, 2019 at 15:38
  • \$\begingroup\$ Do you know how to design the VDD filtering for the OpAmps, so the shared VDD(s) are not a feedback path to cause oscillation? You need to create "local batteries" for the first two opamps. \$\endgroup\$ Commented Mar 10, 2019 at 22:17
  • \$\begingroup\$ Thanks again for the help. I really appreciate the time you took to simulate the interference. I do not know how to design VDD filtering for OpAmps. I will look that up. \$\endgroup\$
    – Ryan Locke
    Commented Mar 11, 2019 at 14:00

You say

The signal will usually have a range between 10 and 70 uV. However, under certain circumstances the range can change, and I am expecting it to fluctuate between 10 and 500 uV (rare, but possible).

So, that's a range of 499 steps of 1µV between 1 µV and 500 µV.

An ADC has \$2^N\$ steps, with \$N\$ being the number of bits.

You'd need 9 bits to represent 512 values, which would totally suffice. Your expensive 24 bit ADC has an output of which you only care about the most significant 9 bit; 15 bit are totally irrelevant to you. Wrong choice to use a 24-bit ADC!

Most microcontrollers have a 10 bit or a 12 bit ADC built in. Go with that instead of using a dedicated ADC.

Then, you'd probably need to amplify the signal to match it to the range the built-in ADC. Since we don't know what that ADC is, we can't tell you what you'd need.

Also, as said before, you'd need to come clear about the signal source impedance. You're looking at a bandwidth of 40, maybe 50 kHz, so the source impedance will defined what you need in noise figure from your amplifier.

Simplifying a bit:

Thermal noise has a power of \$P = k_B B T\$; with \$B\$ being the bandwidth and \$T\$ being the temperature; \$k_B\$ is Boltzmann's constant.

At room temperature, this formula gives us \$-204\,\text{dBW}\$ (10⁻²⁰.⁴ watt per hertz). You're dealing with 50 kHz = \$\frac 12\cdot 10^5\text{ Hz}=47\text{ dBHz}\$, so you get \$(-204+47)\text{ dBW}=-157\text{ dBW}=10^{-15.7}\text{ W}\$ in noise power at the input of whatever amplifier you use.

The noise voltage is a function of the noise power and the input impedance of your amplifier:

\begin{align} P &= \frac{V^2}R\\ V &= \sqrt{PR}\\ &= 10^{-7.85} \sqrt{\text W}\cdot \sqrt R \end{align}

So, if your noise voltage needs to be lower than half a microvolt for your 1 µV requirement to even remotely make sense,

\begin{align} V &= 10^{-7.85} \sqrt{\text W}\cdot \sqrt R\\ &\overset!< 0.5\cdot 10^{-6}\text{ V}\\ \implies\\ \sqrt{R} &< \frac{0.5\cdot 10^{-6}\text{ V}}{10^{-7.85} \sqrt{\text W}}\\ &= 0.5\cdot 10^{1.85}\frac{\text{V}}{\sqrt{\text W}} \implies\\ R &< 0.25\cdot 10^{3.7}\text{ Ω}\\ &\approx 1.25\text{ kΩ} \end{align}

That means that even with the perfect, noise-free amplifier, your voltage source must be able to drive a 1.25 kΩ load, or your resolution is mathematically impossible to achieve (that's the worst kind of impossible).

Note that real-world amplifiers increase the noise. We measure that as Noise Figure, the ratio of signal-to-noise power ratio (SNR) coming out divided by SNR going in. Let's assume you'll have a non-trivial time building anything better than NF=3 dB.

As you can infer from above equations, this means that for your measurements to still make sense, you need to drop the input impedance by another 3 dB, i.e. half it, and your signal source still needs to drive that reliably.

So, that defines your amplifier needs – it's probably not going to be an instrumentation amplifier, as that solves few of the problems you have and gives you, as a cascade of multiple lower-gain amplifier stages, an additional noise figure problem.

  • \$\begingroup\$ Thanks a lot for the detailed answer. So in this case the ADC bit resolution was not the limiting factor, but instead the amplifier. What kind of circuit or amplifier should I be looking at to amplify the signal, assuming I use a 12 bit SAR ADC which comes with the PIC32MZ micro-controller? \$\endgroup\$
    – Ryan Locke
    Commented Mar 8, 2019 at 18:48
  • \$\begingroup\$ I was also wondering weather using a 24 bit ADC for a range of 0 to 2.5/3 V (instead of 0 to 500 uV) can be used to measure my signal. Instead of amplifying the signal which comes with a whole host of problems, can't I use the current schematic where I'll be able to measure 2.5/(2^24) ~ 1.5e-7 V assuming no bits lost. \$\endgroup\$
    – Ryan Locke
    Commented Mar 8, 2019 at 19:08
  • \$\begingroup\$ OK, I'm going to repeat what I said three times already: It depends on your signal source. Without specifying that, nobody can help you. Please don't ask again for the type of amplifier without delivering what we clearly say you need to deliver multiple times. \$\endgroup\$ Commented Mar 8, 2019 at 19:21
  • \$\begingroup\$ @MarcusMüller s/with 𝑁 being the number of steps/with 𝑁 being the number of bits / I know exactly how you made that typo! \$\endgroup\$
    – TimWescott
    Commented Mar 8, 2019 at 20:18
  • 1
    \$\begingroup\$ that's not a source impedance! The source impedance is the relation between load resistance and voltage drop from the source. You'll need to figure this out by measurement – do the same experiment with different resistors loading your coil, and measure voltage across them. Calculate source impedance from that. Then apply to my formulas for best-case noise voltage. \$\endgroup\$ Commented Mar 9, 2019 at 0:11

Do I need to use an instrumentation amplifier for this design?

Not necessarily, the problem stems from noise internal to amplifiers. In short, Instrumentation amplifiers actually have more noise than a single amplifier because the noise increases with the number of amplifiers.

A good article to read is Noise: The. Three. Categories—Device,. Conducted,. and. Emitted. Bonnie Baker, which explains amplifier noise, how to calculate it. Explaining how to calculate noise and design an analog subsystem is too long for one answer as it requires pages of information. But there is plenty of information out there

The idea is to find an amplifier with acceptably low noise for your application in the frequency region of interest for the signal you have. If full advantage of the resolution of the 24-bit ADC is going to be used, then noise needs to be controlled by filtering. 24-bits across a 5V span is 298nV and that is difficult to achieve.

  • \$\begingroup\$ The signal will be noisy and I really don't want the amplifiers adding noise to an already weak and noisy signal. In your opinion, will my current design work? Anything that I can do to improve the performance and accuracy of the design? \$\endgroup\$
    – Ryan Locke
    Commented Mar 8, 2019 at 17:58
  • 2
    \$\begingroup\$ I don't really see a design, to me design says schematic. The rails and gain are essential to knowing what the noise will be. Filtering, bandwidth and SNR all must be considered. \$\endgroup\$
    – Voltage Spike
    Commented Mar 8, 2019 at 18:07

Questions/ideas to be checked before choosing

  • Why is the signal noisy? Is it due to high impedance of the source -> choose part with high input impedance (e.g. FET) and place close to the source

  • Which frequencies are relevant? If only f>1kHz, then do not use auto zeroing/chopper, but put a decent filter in

  • Is the source impedance high in both ends or in one (-> then OPAMP may be enough)

  • Does the signal have a high common mode -> check CMMR in Datasheet

  • Check maximum gain/gain vs frequency in the datasheet in order to determine if one or 2 stages are better for you (Do not worry about adding noise by splitting into two stages or adding noise by the amplifier for small signals. Such stories are fairytale, and I never had the situation that an correctly done amplifier made it worse)

  • In case of with crosstalk on the circuit board, see if using an instrumentation amplifier (e.g. x100) and a difference amplifier closer to the ADC help, with a decent RF isolation to the instrumentation amp

  • give the first stage an own voltage regulator with some buffer capacitor+a resistor in the power supply.

  • Never use ADC resolution to cover for a small signal level - only if you cant filter analog and amplifying you exceed maximum voltage swing

  • main function of filters in ADC circuits: avoid clipping due to noise, please do the math yourself.

  • for very high impedance sources -> shield driver

So taking all this into account: I personally (since i know these ICs and I usually don't care about a few euros extra) would try it with a INA111 in the first stage (x100), AC coupled to a INA145 (x100) with filtered power supply for the first stage. if needed, i would put in filters the feedback path in the INA111 and the INA145 (Check the datasheet of that circuit, Figure 4). Check also Figure 6,8,11,13 of the INA 111 datasheet, they may be helpful.

Oh. and be careful not to kill the ADC by the amplifier output - maybe put some protective diode in.

  • \$\begingroup\$ Thank you very much for the design guidelines. \$\endgroup\$
    – Ryan Locke
    Commented Mar 11, 2019 at 13:59

Since CMRR of a differential amplifier is 20log(Ad/Ac) where Ad is differential gain and Ac is common mode gain, applying gain with an InAmpn, almost by definition, increases CMRR, so long as the noise is common mode noise, so it may help. It doesn't need to be huge amplification, as you want to avoid saturating.

The approach of very high resolution and no amplification certainly has it's appeal, but it can also make things a bit frustrating, especially if there's no way to see your signals on an oscilloscope!! I'll point you to Stop blinking LD1 on STM32F4 Discovery to see how this bit me in the butt!


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